User`s manual

User’s Manual 45
C.1.4 Reset Generator
The RabbitCore 2000 uses a reset generator, U10, to reset the Rabbit 2000 microprocessor
when the voltage drops below the voltage necessary for reliable operation. The reset
occurs between 4.50 V and 4.75 V, typically 4.63 V. The RabbitCore 2000 has a reset out-
put, pin 37 on header J3, presented to the headers. The reset generator has a reset input,
pin 38 on header J3, that can be used to force the RabbitCore 2000 to reset.
C.2 Chip Select Circuit
Figure C-4 shows a schematic of the chip select circuit.
Figure C-4. Chip Select Circuit
The current drain on the battery in a battery-backed circuit must be kept at a minimum.
When the RabbitCore 2000 is not powered, the battery keeps the SRAM memory contents
and the real-time clock (RTC) going. The SRAM has a powerdown mode that greatly
reduces power consumption. This powerdown mode is activated by raising the chip select
(CS) signal line. Normally the SRAM requires Vcc to operate. However, only 2 V is
required for data retention in powerdown mode. Thus, when power is removed from the
circuit, the battery voltage needs to be provided to both the SRAM power pin and to the
CS signal line. The CS control circuit accomplishes this task for the CS signal line.
In a powered-up condition, the CS control circuit must allow the processor’s chip select
signal /CS1 to control the SRAM’s CS signal /CSRAM. So, with power applied,
/CSRAM must be the same signal as /CS1, and with power removed, /CSRAM must be
held high (but only needs to be battery voltage high). Q13 and Q14 are MOSFET transis-
tors with opposing polarity. They are both turned on when power is applied to the circuit.
They allow the CS signal to pass from the processor to the SRAM so that the processor
/CS1
/CSRAM
/RES
Q15
Q13
Q14
D13
C14
R31
R32
R33
R30
R28
VRAM
VRAM
47 kΩ
300 kΩ
100 kΩ
10 kΩ
2200 pF