User`s manual

XP8300/XP8400/SE110062 s PLCBus
Z-World provides software drivers that access the PLCBus. To allow
access to bus devices in a multiprocessing environment, the expansion
register and the address registers are shadowed with memory locations
known as shadow registers. The 4-byte shadow registers, which are saved
at predefined memory addresses, are as follows.
Before a new addresses or an expansion register value is output to the bus,
its value is stored in the shadow registers. All interrupts that use the bus
save the four shadow registers on the stack. Then, when exiting the
interrupt routine, it restores the shadow registers and outputs the three
address registers and the expansion registers to the bus. This allows an
interrupt routine to access the bus without disturbing the activity of a
background routine that also accesses the bus.
To work reliably, bus devices must be designed according to the following
two rules.
1. The device must not rely on critical timing such as a minimum delay
between two successive register accesses.
2. The device must be capable of being selected and deselected without
adversely affecting the internal operation of the controller.
SHBUS1 SHBUS1+1
SHBUS0 SHBUS0+1 SHBUS0+2 SHBUS0+3
Bus expansion BUSADR0 BUSADR1 BUSADR2