User`s guide

63 | P a g e
Tube SNJ54S04FK SNJ54S04FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H L
L H
_______ _________ ________
_______ _________ _______
_ __
SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3
logic diagram (positive logic)
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
Y = A
_______ _________ ________
_______ _________ _______
_ __
SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004
4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
schematics (each gate)
Input A
VCC
Output Y
GND
130 
1 k
1.6 k
’04
4 k
Input
A
VCC
Output
Y
GND
20 k120 
’LS04
8 k
12 k
1.5 k
3 k
4 k
Input
A
VCC
Output
Y
GND