User`s guide

58 | P a g e
1
10
100
V+ = 5V
100k
1M
10M
10-5 10-4 10-3 10-2
FIGURE 3. TIME DELAY vs RESISTANCE AND CAPACITANCE
1
CA555
EO
8
5
2
6
7
3
4
R1
CT 0.01F
RELAY
COIL
R2
V+
5V
FIGURE 4. REPEAT CYCLE TIMER (ASTABLE OPERATION)
t1
t1 + t2
--------------- =
R1 + R2
R1 + 2R2
------------------------
CA555, CA555C, LM555, LM555C, NE555
8-7
Top Trace: Output voltage (2V/Div. and 0.5ms/Div.)
Bottom Trace: Capacitor voltage (1V/Div. and 0.5ms/Div.)
FIGURE 5. TYPICAL WAVEFORMS FOR REPEAT CYCLE TIMER FIGURE 6. FREE RUNNING FREQUENCY OF REPEAT
CYCLE
TIMER WITH VARIATION IN CAPACITANCE AND
RESISTANCE
Typical Performance Curves
NOTE: Where x is the decimal multiplier of the supply voltage.
FIGURE 7. MINIMUM PULSE WIDTH vs MINIMUM TRIGGER
VOLTAGE
FIGURE 8. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 9. OUTPUT VOLTAGE DROP (HIGH STATE) vs
SOURCE CURRENT
FIGURE 10. OUTPUT VOLTAGE LOW STATE vs SINK
CURRENT
5V
0
3.3V
1.7V
0
t t 2 1 100
10
0.1
0.01
0.001
CAPACITANCE (F)
FREQUENCY (Hz)
10-1 1 10 102 103 104 105
TA = 25oC, V+ = 5V
R1 + 2R2 = 1k
10k
100k
1M
10M
1
MINIMUM TRIGGER (PULSE) VOLTAGE (x V+) (NOTE)
0 0.1 0.2 0.3 0.4
150
100