Datasheet LED Drivers for LCD Backlights White LED Diver for Backlight of Medium/Large-sized LCDs BD9271KUT General Description BD9271KUT is a white LED diver used on backlight of Medium/Large-sized LCDs. This IC can achieve dimming function by SPI control. And through the SPI correspondence, it can set the ON/OFF of each switch, analog dimming and etc. The signals of PWM dimming can set the frequency, ON time and delay of PWM by inputting the external signals to the register.
Datasheet BD9271KUT Absolute Maximum Ratings（Ta=25℃） Parameter Symbol Ratings Unit VCC 36 V Power Supply Voltage at digital part DVDD 4.5 V STB Terminal Voltage VSTB VCC V Power Supply Voltage VD1～VD16 D1～16 Terminal Voltage VERR_DET ERR_DET Terminal Voltage S1～S16, G1～G16, VREF5V, LSP, VS1～S16, VG1～VG16,VREF5V,VLSP, VCOMP1,VCOMP2 COMP1, COMP2 Terminal Voltage CS, CLK, DI, DO, VSYNC, HSYNC Terminal VCS,VCLK,VDI,VDO,VVSYNC,VHSYNC Voltage Pd Power Dissipation 40 V VCC V 7 V 4.
Datasheet BD9271KUT Electrical characteristics (unless otherwise specified, Ta = 25°C, VCC = 12V, STB=3V) Item Symbol Standard value Minimum 【Whole device】 Operating circuit Icc － current Stand-by circuit IST － current 【VREF5V block】 VREF5V output VREF5 4.95 voltage VREF5V Maximum IREF5 15 output current 【Error amplifier block】 COMP1,COMP2 ICOMPSINK 300 terminal sink current LED control voltage VLED 270 【UVLO block】 Operation power VUVLO_VCC 6.
Datasheet BD9271KUT Terminal No., Name, and Function Function No. Function No. Terminal No.
Datasheet BD9271KUT Internal Equivalent Circuit Diagram G1～G16 D1～D16 S1～S16 VREF5V S1～S16 10kΩ GND VREF5V GND GND LSP STB VREF5V 2MΩ LSP STB 500k 1M 500kΩ GND GND GND GND GND COMP1, COMP2 CS, CLK, DI DO DVDD DVDD DVDD DVDD CS,CLK,DI 10kΩ DO 50Ω DGND DGND GND DGND VSYNC, HSYNC ERR_DET Figure 5. Pin ESD Type www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 5/34 TSZ02201-0F1F0C100260-1-2 27.Feb.2015 Rev.
Datasheet BD9271KUT Block Diagram DVDD VREF5V VREF5V STB LSP ERR_DET VCC VREF PWM1 FB1 + UVLO REG FB16 GND OPEN DET SHORT DET - MS1 UVLO DVDD MS1 DI FPGA MS16 CLK CS SPI I/F D1 PWM2 + - G1 MS2 D2 + - MS16 register PWM DUTY CONTROL PWM1 PWM16 CH1 S1 PWM16 LED_ref DAC VSYNC (ON timming) HSYNC (clock) MOS SHORT DET Protect logic DO DGND RES SHORT DET LED16_dr_moni LED LED1_dr_moni LED G2 CH2 S2 EAMP_ref DAC FB1 LED1_dr_moni FB2 LED2_dr_moni D16 FB1 + FB
Datasheet BD9271KUT Typical Performance Curves 400 5.0 4.5 350 4.0 300 3.5 3.0 Icc [mA] IST [uA] 250 200 2.5 2.0 150 1.5 100 1.0 50 0.5 0 0.0 9 13 17 21 25 29 33 9 VCC [V] 13 17 21 25 29 33 VCC [V] Figure 8. Operating Current (Icc) [mA] vs. VCC[V] (LED1-16 OFF) Figure 7. Stand-by Current (IST) [µA] vs. VCC[V] 5.5 5.4 5.3 VREF5V [V] 5.2 5.1 5.0 4.9 4.8 4.7 4.6 4.5 9 13 17 21 25 29 33 VCC [V] Figure 9. VREF5V[V] vs. VCC[V] www.rohm.com © 2013 ROHM Co., Ltd.
Datasheet BD9271KUT Pin Function Descriptions G1-G16 （1,4,7,10,13,16,19,22,27,30,33,36,39,42,45,48PIN） External FET gate driving terminal of LED constant current driver, operating range : 0～5V. S1-S16 （3,6,9,12,15,18,21,24,25,28,31,34,37,40,43,46PIN） Connect to external FET’s source terminal of LED constant current driver.
Datasheet BD9271KUT LSP （50PIN） A pin used for setting the LED SHORT protection detecting voltage. When LSP pin is in OPEN state, the voltage in inward of IC is 1V typ.（Set it in range of 0.8V~3.0V） When LED is lighting, if the voltage of D1～16 pin is higher than 「Voltage of LSP x 5 (V) 」（default 5V） the abnormal state of IC is detected. Because this pin has a high impedance, please connect a capacitor about 1000pF to remove the noise basically. REG VREF5V SHORT DET 2.
Datasheet BD9271KUT COMP2(54PIN) The COMP2 pin is used to feed back the state of voltage to the external power supply in order to optimize the power supply voltage for the LED layer. Positive feedback voltage is output to a pin having the lowest voltage out of the D9 to D16 pins. If the lowest voltage of the D9 to D16 pins is higher than 0.6V typical voltage, the COMP2 pin will become open-circuited. If the lowest voltage of these pins is lower than 0.
Datasheet BD9271KUT Functions of Logic Block Serial interface block This IC is controlled with the CS, CLK, DI, and DO serial interfaces. The following section describes data input format and timing. ◆WRITE MODE ・To write 1 byte of data: CS tCYC tCSS 1 CLK t DI 2 t DIS A6 3 4 5 6 7 8 t DIH A5 A4 A3 tCSH tCLKH A2 A1 D7 W A0 9 10 11 12 13 14 15 16 CLKL D6 D5 D4 D3 D2 D1 D0 Low DO Figure 14.
Datasheet BD9271KUT ◆READ MODE CS tCYC tCSS 1 CLK tDIS DI 2 3 tCLKH 4 5 6 7 tDIH A6 A5 tCSH 8 9 10 11 12 13 14 15 16 tCLKL A4 A3 A2 A1 A0 R * * * * * * * * D6 D5 D4 D3 D2 D1 D0 tDOD D7 Low DO DO_EN Figure 16.
Datasheet BD9271KUT ◆Register map（1/2） The data in every register is updated in 3 ways which are showed below. ①Updated to the newest data immediately when the data is written. ②Updated to the newest data when the next VSYNC or VSYNC_REG signal rises up (positive-edge trigger). ③Updated to the newest data when the next PWM signal rises up (positive-edge trigger).
Datasheet BD9271KUT ◆Register map（2/2） The data in every register is updated in 3 ways which are showed below. ①Updated to the newest data immediately when the data is written. ②Updated to the newest data when the next VSYNC or VSYNC_REG signal rises up (positive-edge trigger). ③Updated to the newest data when the next PWM signal rises up (positive-edge trigger).
Datasheet BD9271KUT ◆Description of registers ●ADDR=00h LEDENA (Ch1 to Ch8 LED Enable control register: Read/Write) Bit 7 6 5 4 Register Name LEDEN[7] LEDEN[6] LEDEN[5] LEDEN[4] Default 1 1 1 1 3 2 1 0 LEDEN[3] 1 LEDEN[2] 1 LEDEN[1] 1 LEDEN[0] 1 The data in register is updated to the newest data immediately when the new data is written.
Datasheet BD9271KUT Note: For counting values, a counter that counts one every four HSYNC signals is used. Default : set08h(8d) to 8 counts Due to there are 4 types of ERRSTATE, the mask time from PWM=H to ERRDET=L is HSYNC8～11 clks. The data in register is update to the newest data when the next VSYNC signal rises up (positive-edge trigger).
Datasheet BD9271KUT ●ADDR=0Ch ERRMOSSHB (LED9 to LED16 ERROR pin monitor: Read) Bit 7 6 5 Register Name Default 4 3 2 1 0 ERRMOSSH_16 ERRMOSSH_15 ERRMOSSH_14 ERRMOSSH_13 ERRMOSSH_12 ERRMOSSH_11 ERRMOSSH_10 ERRMOSSH_09 0 0 0 0 0 0 0 0 ERR ERR monitor 0 Normal １ ERROR The data in register is updated to the newest data immediately when the new data is written.
Datasheet BD9271KUT DAC output voltages to analog are converted with the decoders listed above. 0.3V: 0.3 / 5 * 4095 = 0F5h 0.4V: 0.4 / 5 * 4095 = 147h 0.5V: 0.5 / 5 * 4095 = 199h 0.6V: 0.6 / 5 * 4095 = 1EBh 0.8V: 0.8 / 5 * 4095 = 28Fh 1.0V: 1.0 / 5 * 4095 = 333h 1.2V: 1.2 / 5 * 4095 = 3E7h 1.5V: 1.5 / 5 * 4095 = 4CCh The data in register EAMPREF is update to the newest data when the next VSYNC signal rises up (positive-edge trigger).
Datasheet BD9271KUT This register is used to make setting of pulse duty for PWM light modulation in a total of 12 bits, i.e., Bit7-0 when ADDR11h and Bit3-0 when ADDR12h.
Datasheet BD9271KUT ◆Timing chart ●PWM Delay and ON Duty setting procedure VSYNC 0 1 2 3 5 4 6 4093 4094 4095 0 1 2 HSYNC Delay counter 0 1 2 3 Duty counter 4 5 6 7 8 0 1 2 3 4 5 6 7 8 PWM_OUT_01 Figure 17. Setting for PWM Delay and ON Duty By making register setting, PWM output delay and ON duty time counts of CH1 to CH16 can be controlled. The above timing chart shows an example for CH1. (To make delay time count setting, write 06h in address 31h.
Datasheet BD9271KUT ● ERROR control There are the following four types of ERROR detection signals: (1) LED OPEN, (2) LED SHORT, (3) REGISTER SHORT, and (4) MOS SHORT The following section shows timing charts with the setting below: LED OPEN LED SHORT, REGISTER SHORT are in the same way. (example) ERRMSK[1:0]＝10b (ERR MASK count：08d) zoom (A) HSYNC VSYNC OPEN_ERR PWM ERRMSK[1:0] ERRMSK counter ERR judge ERR_DET (1) (2) (3) Figure 19-1.
Datasheet BD9271KUT MOSSHORT (example) ERRMSK[1:0]＝10b (ERR MASK count：08d) Figure 19-2. Timing Chart for Error detection 2 Zoom (A) is the operation of ERROR detection. (1)…When the abnormal signal MOSSHORT_ERR(internal signal) is detected, and PWM=L, the abnormal condition is detected, ERRMSK counter starts. (2)…When ERRMSK counter reaches to the register ERRMSK[1:0]=10b, the condition is judged to the abnormal. The internal signal ERR_judge=H.
Datasheet BD9271KUT ◆Normal operating mode, start sequence t1 t2 ※C_vref5v = 1uF By inputting the SPI control signal before the PWM signal of VSYNC and HSYNC, LED can be controlled with register settings. t3 t4 Figure 20. Starting Sequence for normal operation When you light the LED by general SPI control, please follow the sequence below. ① Input the power supply of VCC. (If the voltage of VCC pin becomes higher than 7.0V, the analog block starts operating.) ② Input the power supply of DVDD.
Datasheet BD9271KUT PWM dimmingoperation mode 12V ① VCC 3.3V DVDD ② STB ③ 1 2 3 11 12 Control the PWM operation of LED output with PWM signal inputted to VSYNC. 13 VSYNC HSYNC 0.3V S1～16 ※Because the protection functions are masked, the lighting by LED abnormal cannot proceed. H ERR_DET Figure 21. Starting Sequence for PWM dimming1 Settings of PWM dimming operation mode ・VSYNC=PWM dimming signal（Input the pulse signal for PWM dimming to VSYNC.
Datasheet BD9271KUT ◆Condition for protections Protection name Protection pin LED OPEN Dx LEDSHORT Dx RES SHORT Sx MOSSHORT Sx VCC UVLO VCC Detection Condition Dx < 0.1V CHx=EN,PWMx=High Dx > 5V (LSP=OPEN) CHx=EN,PWMx=High Sx < 0.15V(*1) CHx=EN,PWMx=High Sx>0.15V(*1) CHx=EN,PWMx=Low VCC<6.7V Release Condition Protection Type Dx > 0.1V Abnormal detection ERR_DET signal output Dx < 5V (LSP=OPEN) Abnormal detection ERR_DET signal output Sx > 0.15V(*1) Sx < 0.15V(*1) VCC>7.
Datasheet BD9271KUT ・RESISTOR SHORT protection ・MOSFET SHORT protection When PWMx=HIGH, if the voltage of Source pin becomes lower than 0.15V(typ), ERR_DET = LOW is outputted and RES SHORT error will be detected, and this error state is realeased when the voltage of Sourse pin comes back to 0.15V(typ) or higher. The initial value of the detect threshold of RESSHORT and MOSSHORT are 0.15V. And those correspond to the register LEDREF. When PWMx=LOW, if the voltage of Source pin becomes higher than 0.
Datasheet BD9271KUT Application of BD9271KUT 1. About the Feedback Between External LED Power Supply for DCDC Converter and COMP Pin By connecting the COMP1,2 which are the error amplifier outputs of BD9271KUT to the feedback pins of DCDC converter (inv input), the state which the cathode voltages of LED bars are lower than the EAMP standard voltage (typ.0.6V) which is set by writing the registers is transmitted to DCDC side, and the DCDC voltage can be raised.
Datasheet BD9271KUT 2. About the Clamp Circuit In BD9271KUT, the absolute maximum voltage of D pin which is connected to the drain of external MOSFET is 40V. Due to it is necessary to raise the power supply voltage according to the VF of the used LED bar, the voltage of D pin maybe exceed the absolute maximum when PWM is LOW. In this case, in order to secure the absolute maximum voltage of the D pin, it is necessary to set up a clamp circuit at the drain side of the NMOSFET.
Datasheet BD9271KUT 3.
Datasheet BD9271KUT Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply terminals. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines.
Datasheet BD9271KUT Operational Notes – continued 11. Unused Input Terminals Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC.
Datasheet BD9271KUT Ordering Information B D 9 2 7 1 Product name www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 K U T Package KUT:TQFP64U - XX Packaging and forming XX: Please confirm the formal name To our sales 32/34 TSZ02201-0F1F0C100260-1-2 27.Feb.2015 Rev.
Datasheet BD9271KUT Physical Dimension Tape and Reel Information Package Name www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 TQFP64UM 33/34 TSZ02201-0F1F0C100260-1-2 27.Feb.2015 Rev.
Datasheet BD9271KUT Revision History Date Revision 07.Jan.2013 22.Aug.2013 001 002 06.Mar.2014 003 27.Feb.2015 004 Changes New Release P13～19. Add comment about the update timing of the register P4. Comment correction about Pin54,55 P9. Value correction about STB voltage P8, 25. Add comment that RESSHORT, MOSSHORT protection is corresponds to the register 02h, 03h. P12. Add about AC characteristics of HSYNC and VSYNC signals P13. The register updated timing is corrected. P18.
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