User manual

AN020201-0904 Discussion
3
Application Note
Battery-Level Detection in Z8 GP MCU Peripherals
;**********************************************************
;* Input: Vcc
;*
;* Output: P0 display the LVD register
;**********************************************************
LVD_IMAGE .EQU %A0 ;LVD image register
ld rp,#%0D
ld lvd,#1 ;enable LVD
nop
nop
loop_LVD:
ld LVD_IMAGE,lvd
ld rp,#%0
ld p0,LVD_IMAGE
ld rp,#%0D
jr loop_LVD
Low-Voltage Detection Register—LVD(D)0Ch
Voltage detection can be disabled by clearing bit 0 of the Low Voltage Detection
Register. The default upon RESET is for low voltage detection to be disabled. See
Table 1.
Table 1. Low Voltage Detection Register
Bit 7 6 5 4 3 2 1 0
Reset 1 1 1 1 1 0 0 1
CPU Access X X X X X R R R/W
*Note: X = Undefined; R/W = Read/Write; R = Read Only.
Bit
Position Description
[7:3] Reserved; no effect.
2 1: High voltage detection flag set.
0: High voltage detection flag reset*.
1 1: Low voltage detection flag set.
0: Low voltage detection flag reset*.
0 1: Enable voltage detection.
0: Disable voltage detection.
*Note: Default after POR.