User manual

PB015203-0605 Block Diagram
ZGR163L ROM MCU Family
Product Brief
2
This family of devices is compatible with the ZGR323L ROM mask and ZGP323L OTP families.
Block Diagram
Figure 1. Functional Block Diagram
Z8® Core
Port 2
Port 0
P21
P22
P23
P24
P25
P26
P27
P20
I/O Bit
Programmable
P04
P05
P06
P07
P00
P01
P02
P03
I/O Nibble
Programmable
256 x 8-Bit
Register Bus
Internal
Address Bus
Internal
Data Bus
Expanded
Register
File
Expanded
Register Bus
Z8
®
Core
Counter/Timer 8
8-Bit
Counter/Timer 16
16-Bit
V
DD
V
SS
XTAL
Pref1/P30
P31
P32
P33
P34
P35
P36
P37
Port 3
Machine
Timing &
Instruction
Control
Power
4
4
ROM
Up to 16K x 8
Watch-Dog
Timer
Low Voltage
Detection
High Voltage
Detection
2-Comparators
Note: Refer to the specific package for available pins.
Power-On
Reset
Register File
Back to front page