Specifications

Processor Description (V40)
CPU - Central Processing Unit
The architecture of the CPU functional block is compatible with the
8088. The CPU recognizes all of the instructions found in the 8088
and 80188 microprocessors. Figure 5-2 shows a block diagram of the
CPU divided into two elements: the Bus Control Unit (BCU) and the
Execution Unit (EXU). The BCU prefetches instructions and data into
a 4-byte instruction queue. The EXU executes the instructions. This
pipelined architecture increases the throughput over the typical
microprocessor that must wait for an instruction or operand to be
fetched before operation is continued.
TOUT2
TCTL2
TCLK
TCU
ICU
IRQ1-7
WCU
VCR
SCU
DCU
CGU
BIU
CPU
BAU
TxD
RxD
DMARQ
DMAACK
X1
X2
CLKOUT
A16/PS0-
A19/PS3
A8-15
AD0-7
BS0-2
QS0-1
ASTB
READY
RESOUT
BUFR/W
POLL
MWR
MRD
IOWR
IORD
BUFEN
RESET
HLDAK
HLDRQ
NMI
INTAK
Figure 5–1. V40 Block Diagram.
5-6