Specifications

Application Examples
; V40 SCU SERIAL CONTROLLER AND BAUD RATE TIMER
TCU_PORT EQU 256*OPHA_INIT+TULA_INIT ; TCU I/O ADDRESS
TCU_TMR1 EQU TCU_PORT+1 ; TIMER 1 CONTROL
TCU_TMR1_BD1 EQU 26 ; SCU BAUD OF 9600
TCU_TMR1_BD2 EQU 0 ;
TCU_MODE EQU TCU_PORT+3 ; TCU MODE ADDRESS
TCU_MODE_INIT EQU 01110110B ; BIN, SQ, 2 BYTE, T1
SCU_PORT EQU 256*OPHA_INIT+SULA_INIT ; SCU I/O ADDRESS
SCU_CMND EQU SCU_PORT+1 ; COMMAND ADDRESS
SCU_CMND_INIT EQU 00000101B ; ENABLE TXD AND RXD
SCU_MODE EQU SCU_PORT+2 ; MODE ADDRESS
SCU_MODE_INIT EQU 01001110B ; DIV BY 16, 8 BT, 0 PY, 1 SP
SCU_MASK EQU SCU_PORT+3 ; MASK ADDRESS
SCU_MASK_INIT EQU 00000011B ; MASK INTERRUPTS
; V40 INTERRUPT CONTROLLER
ICU_PORT EQU 256*OPHA_INIT+IULA_INIT ; ICU I/O ADDRESS
ICU_IIW1 EQU ICU_PORT+0 ; INIT WORD 1 ADDRESS
ICU_IIW1_INIT EQU 00010011B ; EDGE TRIG, IIW4 ENABLE
ICU_IIW2 EQU ICU_PORT+1 ; INIT WORD 2 ADDRESS
ICU_IIW2_INIT EQU 00001000B ; BASE VECTOR TYPE OF 8
ICU_IIW4 EQU ICU_PORT+1 ; INIT WORD 4 ADDRESS
ICU_IIW4_INIT EQU 00000001B ; NORMAL NEST, FI COMMAND
ICU_MASK EQU ICU_PORT+1 ; MASK ADDRESS
ICU_MASK_INIT EQU 11111111B ; MASK COUNTER/TIMER 0
; MASK V40 SERIAL PORT
; MASK WATCHDOG TIMER
; MASK COUNTER/TIMER 1
; MASK SBX REQUEST 0
; MASK SBX REQUEST 1
; MASK 82050 SERIAL PORT
; MASK STD BUS CTRL PORT
; MASK FRONTPLANE J3-8
; MASK FRONTPLANE J3-10
; V40 DMA CONTROLLER
DCU_PORT EQU 256*OPHA_INIT+DULA_INIT ; DCU I/O ADDRESS
DCU_DICM EQU DCU_PORT+0 ; DICM ADDRESS
DCU_DICM_INIT EQU 00000001B ; RESET DCU
DCU_DCH EQU DCU_PORT+1 ; DCH ADDRESS
DCU_DCH_INIT EQU 0 ; CHANNEL 0
DCU_DBC EQU DCU_PORT+2 ; DCU BASE COUNT
DCU_DBA_OFF EQU DCU_PORT+4 ; DCU BASE ADDRESS
DCU_DBA_SEG EQU DCU_PORT+6 ; OFFSET AND SEGMENT
DCU_DDC EQU DCU_PORT+8 ; DCU DEVICE CONTROL
DCU_DDC_INIT EQU 0 ; ENABLE DMA
DCU_DMD EQU DCU_PORT+0AH ; DCU MODE
DCU_DMD_WRTE EQU 01000100B ; SNGL, INC, WRITE
DCU_DMD_READ EQU 01001000B ; SNGL, INC, READ
DCU_DMK EQU DCU_PORT+0FH ; DCU MASK
DCU_DMK_INIT EQU 0EH ; NOT MASKED
;
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