Specifications

Theory of Operation
After the above steps are completed, install the ZT 8832s into the
STD bus card cage. The ZT 8832s power up not selected. This means
that the dual port RAM, STD bus control port, and interrupt status
port are not accessible by the STD bus CPU. The Board Select Port is
the only port accessible. To begin communicating with a ZT 8832, the
STD bus CPU must write the board select address of that ZT 8832 to
the Board Select Port (see Figure 3-3). After the board select address
is written, the STD bus CPU is free to communicate with the ZT 8832
as though there were no bank selection. To begin communicating with
a different ZT 8832, the STD bus CPU simply writes the new board
select address. This automatically switches out the currently enabled
ZT 8832 and switches in the new one.
Register:Board Select
Address:38h
Access:Write
76543210
S2 S1 S0
Board Select Address
000 All selected
1
001 1
010 2
011 3
100 4
101 5
110 6
111 7
—————
1
Programming the All Selected address selects the ZT 8832 regardless of the jumper
programmed board select address. This operation is useful for writing the same data to the dual
port RAM or control port of all ZT 8832s at the same time.
Warning: Do not perform an STD bus read from the ZT 8832 dual port RAM or I/O if the All
Selected option is programmed; this may damage the STD bus system.
Figure 3–3. Board Select Port Architecture.
3-16