Specifications

Index
CT10 (STD bus AUX GND) .................................. A-20
CT14 (STD bus dual port RAM addressing)
....................A-20
customer support
............................................... C-1
custom I/O
.....................................................14-2
frontplane connector J4
................................14-4, B-10
cuttable traces (see CT1, CT2, etc.)
............................ A-17
-D-
DBA/DCA - DMA Base and Current Address registers ..........9-11
DBC/DCC - DMA Base and Current Count registers
............9-10
DCE (data communication equipment) (see DCE/DTE)
.......... 1-8
DCE/DTE
.................................................1-8, 11-3
definitions
................................................... D-2
selecting via jumpers
.........................................A-3
selecting with serial cable in J2
............................. 11-24
serial port pinouts
...........................................B-12
DCH - DMA Channel register
................................... 9-8
DCU - DMA Control Unit (V40)
.......................... 5-22, 9-1
autoinitialization
............................................ 9-18
block diagram
................................................ 9-4
definition
.................................................... D-2
functional description
.........................................9-4
I/O port addressing
..................................... 2-13, 9-7
operation
....................................................9-17
programmable registers
....................................... 9-7
programming
............................................... 9-18
reset
........................................................ 9-17
DDC - DMA Device Control register
........................... 9-12
development systems (see STD ROM, DOS MPX)
...............1-4
device driver
.................................................... 3-3
DICM - DMA Initialize Command register
...................... 9-8
dimensions of the ZT 8832
......................................B-6
direct memory access (DMA), definition
........................ D-2
divide error interrupt (V40)
.....................................5-31
Divisor Latch (82050 ACC)
...................................11-17
iv