Specifications

Glossary
frontplane The edge of the board on which the extractor is
located, opposite to the backplane. This term is
generally used to define the location of user
interface signals.
ICU Interrupt Control Unit, on the V40 CPU.
INTRQ*
INTRQ1*
INTRQ2*
Interrupt Requests. These STD-80 signals are
processor card input signals that conditionally
interrupt the program when enabled by a specif-
ic program instruction. INTRQ2* was formerly
called CNTRL*; see CNTRL*.
LSTTL Low Power Schottky Transistor Transistor
Logic. See Schottky TTL.
mark A negative voltage on a serial link.
NMI Non-Maskable Interrupt. Interrupt request input
that cannot be disabled through software control.
Generally used to signal events such as power
failure and parity error.
NMIRQ* Non-Maskable Interrupt Request. STD bus
signal (pin 46) that generates an NMI. See NMI.
PIC Programmable Interrupt Controller (on the
ZT 8802, equivalent to the Intel 8259A). This
device prioritizes and handles interrupt requests
from the STD bus.
pop A stack operation that retrieves one byte from
the top of the processor stack.
D-3