Specifications

Appendix D
GLOSSARY
backplane The edge of the board that inserts into the STD
bus connector. This term is generally used to
define the location of signals that are routed
across the STD bus.
BAU Bus Arbitration Unit. Section of the CPU that
controls which internal or external bus master
has access to the buses at any given time.
BCD Binary Coded Decimal. Representation of the
cardinal numbers 0 through 9 by ten binary
codes. Each binary code is 4 binary digits long.
BIU Bus Interface Unit. Section of the CPU that
controls the external address, data, and control
buses.
CGU Clock Generator Unit. Section of the CPU that
provides a clock reference with a 50% duty
cycle to the CPU.
CMOS Complementary Metal Oxide Semiconductor.
Provides low power density and high noise
immunity.
D-1