Specifications

Introduction
Interrupt Controller
The ZT 8832 includes an eight-input programmable interrupt
controller with an 8259 architecture. Features of the interrupt
controller include level- and edge-triggered sensing, fixed and rotating
priorities, and the ability to mask individual inputs. Two of the
interrupt request inputs are available through a frontplane connector,
to be used as needed by the application. The remaining inputs are
dedicated to interrupt sources such as counter/timers for timed or
periodic interrupt generation, serial controllers for interrupt driven
data transfers, zSBX expansion module for interrupt driven I/O, and
the STD bus to support interrupt-driven data transfers from the STD
bus CPU through dual port memory.
Counter/T
imers
The ZT 8832 has three independent 16-bit counter/timers with an
8254 architecture that can be used as timers or as event counters.
There are six programmable counter/timer modes: interrupt on end of
count, frequency divider, square wave generator, software-triggered,
hardware-triggered, and retriggerable one-shot. One of the
counter/timers is available through a frontplane connector, to be used
as required by the application. The other two counter/timers are
dedicated to uses such as baud rate generation for the V40 serial
channel and interrupt generation for timed and periodic interrupts.
Watchdog T
imer
The ZT 8832 includes a two-stage watchdog timer. The main function
of a watchdog timer is to monitor system operation and take
corrective action if the system fails to operate as designed. While in
operation, the watchdog timer must be strobed at a predetermined rate
by toggling a parallel port bit. Failure to strobe the watchdog results
in a non-maskable interrupt to the V40. The ZT 8832 is reset unless
the non-maskable interrupt service routine takes corrective action that
includes strobing the watchdog timer within a certain time period.
The watchdog timer is enabled through jumper selection.
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