Specifications

Introduction
Dual Port Memory
The ZT 8832 is populated with 32 Kbytes of RAM that is accessible
from both the local CPU and the STD bus CPU. Arbitration for
simultaneous access is done entirely in hardware. To increase system
performance, the dual port memory is physically separated from the
local memory. This permits the local CPU to continue executing local
operations while the STD bus CPU is accessing the dual port memory.
The STD bus CPU can also continue operations while the local CPU
accesses dual port memory. Only when both CPUs attempt a dual port
memory access is the operation of one suspended until the other is
completed. Repetitive access from both processors is interleaved on a
machine cycle basis. The dual port memory also supports software
programmable interrupts, a locking mechanism, and optional battery
backup. The locking mechanism allows either the STD bus CPU or
the local CPU to keep the other from accessing the dual port memory
until the lock is removed.
Board Select
Option
One ZT 8832 occupies 32 Kbytes of STD memory addressing space.
For applications using multiple ZT 8832s, each can be mapped into a
unique 32 Kbyte space, or up to seven can be mapped into a common
32 Kbyte space by using the board select option. This option is
enabled by mapping each ZT 8832 to the same address range and a
unique board select address. In operation, all commonly mapped
ZT 8832s monitor the same I/O port for a board select address. To
communicate with a ZT 8832, the STD bus CPU writes the
appropriate board select address to the common I/O port. The STD
bus CPU is then free to communicate with the selected ZT 8832. It is
important to note that all functions local to the ZT 8832 continue to
operate when it is not selected by the STD bus CPU.
1-7