Specifications

SBX Expansion Module
ZT 8832 SPECIFICS
The expansion module interface is supported through connector J4;
the pin assignments given on page B-15. The expansion module
supports Direct Memory Access (DMA) using the DMA controller
discussed in Chapter 9. The DMA controller transfers data between
the expansion module and either local or dual port RAM at rates of up
to 1 1/3 Mbytes per second. The DMA signals supported are DMA
Request (MDRQT) and DMA Acknowledge (MDACK*). The
Terminate DMA (TDMA) signal is not supported.
The expansion module standard defines three address lines and two
chip selects. This provides a total of 16 I/O port addresses. To
overcome this limitation, the ZT 8832 expansion module adds four
address lines. These address lines are connected in the default
configuration and can be removed using cuttable traces (see
page A-19 for details). Without these address lines, the chip select 0
signal (MCS0*) is valid over the I/O address range 2F8 through 2FFh,
and the chip select 1 signal (MCS1*) is valid over the I/O address
range 300 through 307h. As the added address lines are used, the chip
select 0 signal grows downward in I/O address space and the chip
select 1 signal grows upward. For example, if all seven address lines
are used, chip select 0 is mapped to I/O address 280 through 2FFh and
chip select 1 is mapped from I/O address 300 through 37Fh.
The expansion module supports two interrupt request signals for
interrupt driven communications. Interrupt Request 0 (MINTR0*) is
connected to IRQ2 of the interrupt controller, and Interrupt Request 1
(MINTR1*) is connected to IRQ3 of the interrupt controller. The
interrupt controller is explained in detail in Chapter 8.
The expansion Module Present (MPST*) signal is not supported.
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