Specifications

Serial Communications (82050)
Table 11-5
ACC Register Summary (continued).
Register Address
Bit
No.
0 DLAB = 1 1 DLAB = 146
Divisor
Latch (LSB)
Divisor
Latch (MSB)
Modem
Control
Register
Modem
Status
Register
DLL DLMMCR MSR
0D0D8
Data
Terminal
Ready
(DTR)
Delta Clear
to Send
(DCTS)
1
D1 D9
Request to
Send
(RTS)
Delta Data
Set Ready
(DDSR)
2 D2 D10
0
Trailing Edge
Ring
Indicator
(TERI)
3 D3 D11
Out 2
Delta Data
Carrier
Detect
(DDCD)
4 D4 D12Loop
Clear to
Send (CTS)
5 D5 D130
Data Set
Ready (DSR)
6 D6 D140
Ring
Indicator
(RI)
70
5
Line Status
Register
LSR
Data Ready
(DR)
Overrun
Error (OE)
Parity
Error (PE)
Framing
Error (FE)
Break
Interrupt
(BI)
Transmit
Holding
Register
(THRE)
Transmit
Empty
(TEMT)
0
Data Carrier
Detect
(DCD)
D7 D15
11-26