Specifications

Serial Communications (82050)

The STB bit selects the number of stop bits added to each character

transmitted and removed from each character received. Programming

STB with a logical 0 selects one stop bit; a logical 1 selects two stop

bits. The exception to this is when the character length is defined as

five. In this case, a logical 1 selects one and a half stop bits.

The parity options are programmed through the PEN, EPS, and SP

bits. PEN (bit 3) enables and disables parity. A logical 0 in PEN

disables parity and a logical 1 enables parity. With parity enabled, the

ACC adjusts the parity bit of transmitted data to produce an even or

an odd number of 1s when added to the character bits. With parity

enabled, the ACC also tests the parity of the received data.

The EPS bit selects even or odd parity. Even parity means that there is

an even number of 1s in the character data, including the parity bit.

Odd parity means that there is an odd number of 1s in the character

data, including the parity bit. Odd parity is selected by programming

bit 4 with a logical 0, and even parity is selected by programming

bit 4 with a logical 1.

Bit 5 (SP) is the stick parity bit. With bits 3 and 5 a logical 1, the

parity bit is transmitted and received in the state opposite that of bit 4.

The SB bit position enables and disables break control. A logical 0

disables break and a logical 1 enables it. Enabling break forces the

TxD output to the marking (negative) state.

The DLAB bit controls access to the ACC divisor latch. Pro-

gramming bit 7 with a logical 1 selects the Divisor Latch; a logical 0

selects the Transmit Buffer, Receive Buffer, and Interrupt Enable

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