Specifications

Serial Communications (82050)
Read/Write Control
The main function of the Read/Write Control block is to supervise the
interface between the ACC internal registers and the CPU. This
includes enabling one of the ACC programmable registers onto the
system data bus based on control signal inputs.
Receiver
The Receiver block converts serial data input on the RxD signal to a
parallel format with the start, stop, and parity bits removed. The
parallel data is placed in the Receive Buffer and the receiver Data
Ready bit in the Line Status register is set to a logical 1. Activating
the Data Ready bit generates an interrupt if the receive data interrupt
is not masked by the Interrupt Enable register. The Receiver also
monitors the incoming data for parity, overrun, and framing errors,
and reports any such errors to the Line Status register.
T
ransmitter
The Transmitter block converts the contents of the Transmit Buffer
from a parallel format into a serial string. Start, stop, and parity bits
are added, as specified by the programmer in the Line Control
register. The serial string is then transmitted out of the TxD signal and
the Transmitter Holding Register Empty bit is set to indicate that the
ACC is ready to accept a new character for transmission. Activating
the Transmitter Holding Register Empty bit will also generate an
interrupt if the transmit data interrupt is not masked by the Interrupt
Enable register.
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