Specifications

DMA Controller (V40)

OPERATION

Reset

The DCU registers are initialized after power-on or after a pushbutton

reset. Table 9-2 shows the initialized state.

Table 9-2

DCU Register Default State.

Default Bit Value

[1]

DCH - - - 00001

DMD 000000- 0

DDC (low) - - 0 0 - 0 - -

DDC (high) ------00

DST ----0000

DMK ----1111

[1]

Bit positions marked with a dash (-) can default to 1 or 0.

Single Mode Transfers

In single mode transfers, the DCU releases control of the bus after

each data transfer. The DCU then enters a slave mode, permitting

lower priority bus masters to gain access to the bus resources.

Demand Mode Transfers

With the DCU programmed for demand mode, the DMA channel is

serviced until the DMA request for that channel is removed. The

DCU then releases control of the bus and enters a slave mode,

permitting lower priority bus masters to gain access to the bus

resources.

9-17