Specifications

DMA Controller (V40)
For read operations, the BASE bit set to a logical 0 defines whether
the current register is made available for a read operation or whether
the base and current registers are written to during a write operation.
A logical 1 in the BASE bit means the base register is selected.
Register:DCH
Address:Base + 1
Access:Write Only
76543210
00
BASE
Base Only
0 Select current (read),
select both base
and current (write)
1 Select base (read/write)
—————
Register:DCH
Address:Base + 1
Access:Read Only
76543210
1000
BASE
Base Only
0 Current (read), base
and current (write)
1 Base (read/write)
———
Figure 9–3. DMA Channel Register.
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