Specifications
DMA Controller (V40)
DMA Initialize Command (DICM)
The initialization command, shown in Figure 9-2, includes one bit
that can be set to a logical 1 to reset the DCU. This register must be
written to with the byte output instruction.
Register:DICM
Address:Base + 0
Access:Write Only
76543210
RES
Reset
0 No reset
1 Reset
0——————
Figure 9–2. DMA Initialization Command Register.
DMA Channel
(DCH)
The DMA Channel register, shown in Figure 9-3, must be accessed
with byte output and input instructions. The DCH register has a
different format for read and write operations. For the write operation,
the BASE bit is used to select between the base and current register
groups for both the address and count. Both base and current registers
are written or only the current register is read if BASE is first
programmed with a logical 0. Programming BASE with a logical 1
selects the base to be read or written to.
9-8