Specifications

Interrupt Controller (V40)
Interrupt Status
The Interrupt Request (IRQ), Interrupt In-Service (IIS), and Interrupt
Mask (IMKW) registers are available to the programmer. The IRQ
and IIS registers are read by first writing the appropriate read register
command to the ICU IMDW register. After the read register
command is written, the selected register can be read any number of
times. It is possible for an interrupt to occur after the read register
command is written to the IMDW register and before the selected
register is read. The interrupt service routine could alter the IMDW
register, causing the wrong register to be read. This is prevented by
disabling interrupts with the "disable interrupt" instruction before
programming the IMDW register, and not enabling them until after
reading the register. The IMKW register can be read directly from the
ICU without first writing to the IMDW register.
The ICU supports a polled operation for systems not wishing to use
interrupts. Although not as efficient as an interrupt-driven system, it is
more efficient than having to poll eight different I/O ports to see if a
peripheral is in need of servicing. To use the ICU in a polled mode,
the application program must not enable CPU interrupts. The ICU is
polled by first writing the poll command and then reading the IPOL
register.
Pr
ogramming
The ICU is enabled and mapped into an I/O address range using the
V40 configuration registers. The ICU must be initialized with 2, 3, or
4 initialization control words before operation can begin. Once the
initialization control words have been programmed, ICU operation is
controlled by command words. The command words define the
operating mode and can be programmed at any time after
initialization.
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