Specifications

Interrupt Controller (V40)
IMDW
IMDW controls the method of reading status from the ICU and
enables a special type of interrupt masking.
The format of the IMDW is shown in Figure 8-9. The first two
bits are used to select the IRQ and IIS registers so they can be
read by the application software. A logical 1 in bit 0 selects the
IIS register and a logical 0 selects the IRQ register. A logical 1 in
the SR bit (bit 1) enables the reading of the IRQ and IIS registers.
IMDW
Address: Base + 0
Access: Write
76543210
SR
IS/SR
Register Select
00 No operation
01 No operation
10 Int. Request (IRQ) selected
11 Int. In Service (IIS) selected
POL
Polled Status
0 No operation
1 Polling command
10
SNM EXCN
Nesting Mode 2
01 No operation
10 Exceptional nesting mode
release
11 Exceptional nesting mode
set
Figure 8–9. Interrupt Mode Word.
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