Specifications

Interrupt Controller (V40)
FUNCTIONAL DESCRIPTION
The format of the ICU programmable registers is the same as the
industry standard 8259 Programmable Interrupt Controller, with one
exception: 8085 operation is not supported. The ICU can be divided
into seven functional blocks as shown in Figure 8-1.
Read/
Write
Control
Initialization and
Operation Registers
Control Logic
Interrupt
In-Service
Register
(IIS)
Interrupt
Request
Register
(IRQ)
0
1
2
3
4
5
6
7
Priority
Determination
Logic
Interrupt
Mask
Register
(IMK)
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
INTAK
INTRQ
Internal Data Bus Lower 8 Bits
IORD
IOWR
A2
A1
EN
[1] See Jumper Configuration tables for signal selection information.
Figure 8–1. ICU Block Diagram.
Interrupt Request
Register
The eight interrupt requests, IRQ0 through IRQ7, are input to the
Interrupt Request register. The 8-bit IRQ register maintains a bit
position for each interrupt input. A requesting interrupt sets the bit
position to a logical 1. The bit is automatically reset during the
interrupt acknowledge cycle. The IRQ register can be read by the
application program to determine the status of the requesting
interrupts.
8-4