Specifications

Counter/Timers
Count Registers
The Count register is illustrated in Figure 7-5. Unlike the Mode
register, there is one Count register for each of the three
counter/timers. The Count register transfers count values to and from
the Down Counter. The 16-bit register is programmed with a high
byte, low byte, or both high and low byte, as specified with the
Read/Write Mode bits in the Mode register. If the high byte or low
byte mode is selected, only one read or write operation is needed for
data transfers. Two read or write operations are required for the two-
byte mode, with the low byte transferred first, followed by the high
byte.
Count
Base +
Channel
Number
D15 D14 D13
12
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
15 14 13
D12
11 10 9 8 7
65 43 210
Figure 7–5. Counter/Timer Count Register.
Status
Registers
Each counter/timer includes a Status register. The status can be read
from the Status register at any time. The format for the status is
shown in Figure 7-6.
The first six bits of the Status register provide information about the
programmed state of the selected counter/timer. This information is in
the Status register to prevent the application software from having to
save it. The Null Count bit flags when the last count written to the
Count register is transferred to the Down Counter. This is designed to
prevent the application software from reading the Down Counter
before it is updated to the last count written. The Output Level bit
contains the current state of the counter/timer output (TOUT).
7-12