Specifications

Processor Configuration (V40)
RESET
The V40 configuration registers are automatically initialized to a
default state when power is applied to the V40 and also during reset
from an external source. Table 6-3 shows the default state of the
configuration registers.
Table 6-3
V40 Configuration Register Defaults.
Default Bit Values
[1]
Registers 76543210
OPCN ----0000
OPSEL ----0000
OPHA --------
DULA --------
IULA --------
TULA --------
SULA --------
WCY2 ----1111
WCY1 11111111
WMB --------
RFC
[2]
- - - 01000
TCKS - - - 00000
[1] Bit Positions marked with a dash (-) can default to 1 or 0.
[2] The refresh enable bit of the RFC register is not affected by resets other than
power on.
6-12