Specifications

Processor Configuration (V40)
The only restriction placed on programming these registers is to be
sure the peripherals internal to the V40 are not mapped in the same
address range as other I/O devices local to the ZT 8832. The STD
ROM software programs these registers with the values shown in
Table 6-2.
Table 6-2
STD ROM Programmable Address Selection.
I/O Port
Register Value Address
OPHA 00 ----
DULA D0 00D0h
IULA 20 0020h
TULA 40 0040h
SULA B0 00B0h
6-6