Specifications

Processor Description (V40)
Enhanced Architecture
The V40 CPU includes several enhancements that provide an increase
in performance over the 8088 microprocessor found on many STD
bus designs. The most noticeable performance improvements come
from additional hardware for the Effective Address Generator, Loop
Counters and Shifters, and the use of dual internal data buses.
Using a hardware-effective address generator rather than microcode
reduces the time needed to fetch memory operands by as much as 10
clocks per fetch. Using hardware counters and shifters instead of the
conventional microcode increases the speed of multiply and divide
instructions by as much as four times. Dual internal data buses reduce
traffic for instructions with two operands for effective address
calculation. These enhancements add up to a speed increase of as
much as 30 percent over that of the 8088 microprocessor.
Standby Mode
The CPU’s standby mode reduces power consumption by more than
one tenth during idle periods. Standby mode is automatically entered
when the HALT instruction is executed from the native or 8080
emulation mode. This does not affect any of the internal peripherals,
such as the counter/timers, interrupt controller, refresh controller, or
DMA controller. The CPU automatically exits the standby mode after
a reset or an interrupt.
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