Specifications

CPU Description

All memory addresses are specified by a segment and an offset. The

16-bit segment is shifted four binary digits to the left and added to the

16-bit offset to create the full 20-bit memory address. Table 6-1

shows the conventions established for the 8088 series microprocessors

in using the available segment and offset registers for various types of

memory accesses.

The program always resides in a program segment pointed to by the

PS [CS] register. The Prefetch Pointer (PFP) [IP] always contains the

offset within the program segment. The base of the program stack is

always referenced by the stack segment register (SS), and the top of

the stack is always referenced by the stack pointer register (SP). The

stack always grows "down" in 8088/8086 memory organization.

Stack variables are usually referenced by the base pointer (BP)

Table 6-1

Segment Registers.

MEMORY DEFAULT ALTERNATE

REFERENCE SEGMENT SEGMENT OFFSET

Instruction Fetch PS[CS] NONE PFP[IP]

Stack Operation SS[SS] NONE SP[SP]

Variable (except DS0[DS] PS[CS], DS1[ES], Effective

following) SS[SS] Address

String Source DS0[DS] PS[CS], DS1[ES], IX[SI]

SS[SS]

String Destination DS1[ES] NONE IY[DI]

BP[BP] Used As Base SS[SS] PS[CS], DS0[DS], Effective

BW[BX] Used As Base DS0[DS] PS[CS], DS1[ES], Effective

6-4