User`s guide

31
Mainboard Jumpers Described (continued)
CLK1
The CLK1 jumper sets the speed of the system clock. It will be set
correctly to work with your system, so don’t change this jumper unless
you change CPUs.
Pins Jumpered CPU Clock Speed (MHz)Bus Clock Speed (MHz)
1 and 2 100 66
2 and 3 90 60
1, 2 and 3 75 50
See the diagram, Mainboard Jumpers, for the location of these jumpers.
CACHE1
A fast CPU operates more efficiently when it has a buffer of ultrafast
RAM between itself and system RAM. The CACHE1 jumper configures
how Level 2 cache is used by your system. 256K to 512K of cache can be
added by inserting a standard cache SIMM. The cache controller is
integrated into the system chipset.
CPU Pipelining
Increases data throughput by allowing the CPU to start the next machine
cycle before it finishes processing the current one.
Burst Cache Module
During a single machine cycle, a bursting CPU generates a beginning
address and a quantity of bytes for the cache to expect. Then the CPU
transfers that quantity of bytes as a single package, without needing to
generate any intermediate addresses.
Asynchronous Cache Module
An asynchronous cache can generate wait states that tell the CPU to delay
transferring information until valid data is ready to be transferred to or
from the cache.
Chapter 2 - The Mainboard