Programmer's Guide

RaDeKL Radar API Programmer’s Guide 40
© Multispectral Solutions, Inc. 2006
All Registers contain one 8-bit binary value (1 byte), allowing for a range between 0 and 255 (decimal) or
0x00 and 0xFF (hexadecimal).
Register Data Definitions:
Register Name Address Description
REGISTER_ID_VERS
0 Read-only register. Writing to this register has
no effect. High-order 4-bits contains major
version number and low-order 4-bits the minor
version number. The RaDeKL_DEVICEINFO
structure returned by RaDeKL_GetDeviceInfo
creates an appropriate union (overlay) to extract
the major and minor version numbers.
REGISTER_DETECT
1 Write-only register. Setting bit 0 (0x01)
initiates single detect, setting bit 2 (0x04)
initiates continuous detect. Clearing all bits
(0x00) stops continuous detection. The other
bits are for MSSI internal use only.
REGISTER_TID_TIME
2 Interval for continuous detection. Values are 0
(1 second), 1 (500 ms), 2 (250 ms), 3 (100 ms)
and 4 (50 ms).
REGISTER_RF_CONTROL
3 Write-only register. Setting bit 0 (0x01) causes
the radar device to be reset to factory settings.
The other bits are for MSSI internal use only.
REGISTER_TX_ATTEN
4 Sets the transmitter attenuation. Valid settings
are in the range from 0 to 63 (decimal). For
reference, a value of 63 causes 0 dB
attenuation, 57 = -3 dB, 51 = -6 dB and 43 = -10
dB. See function definition of
RaDeKL_SetTransmitAttenuation for more
information.
REGISTER_RX_ATTEN
5 Sets the receiver attenuation. Valid settings are
in the range from 0 to 255 (decimal). For
reference, a value of 0 causes 0 dB attenuation,
91 = -10 dB and 157 = -20 dB. See function
definition of RaDeKL_SetReceiveAttenuation for
more information.
REGISTER_RANGE
6 Causes detection to be shifted by 512 range bin
increments (256 feet at 0.5 foot resolution).
REGISTER_DELAY
7 Causes detection to be shifted by 8 range bin
increments (4 feet at 0.5 foot resolution).
REGISTER_DAC1
thru
REGISTER_DAC32
8 - 39 Contain the 32 DAC Threshold values.