User`s manual

BL160058 s System Development
Microprocessor Internal Bus
RDR0 TDR0
TSR0RXA0 TXA0
Shift Register OutShift Register In
Baud-Rate
Generator
CKA0
CNTLA0
STAT0
CNTLB0
/RTS0
/CTS0
/DCD0
RSR0
Z180 Serial Ports
The Z180 has two independent, full-duplex asynchronous serial channels,
with a separate baud rate generator for each channel. The baud rate can be
divided down from the microprocessor clock or from an external clock for
either or both channels.
The serial ports have a multiprocessor communication feature that can be
enabled. When enabled, an extra bit is included in the transmitted charac-
ter (where the parity bit would normally go). Receiving Z180s can be
programmed to ignore all received characters except those with the extra
multiprocessing bits enabled. This provides a 1-byte attention message
that can be used to wake up a processor without the processor having to
monitor (intelligently) all traffic on a shared communication link.
The block diagram in Figure 4-13 shows Serial Channel 0. Serial Channel
1 is similar, but modem control lines /RTS and /DCD do not exist. The
five unshaded registers shown in Figure 4-13 are directly accessible as
internal registers.
Figure 4-13. Z180 Serial Channel 0