User`s manual
XP8000 Series (PLCBus
TM
)
Z-World 530-757-3737 21
Outputs
The XP8100 high-current outputs normally have “sinking” driv-
ers. The sinking drivers (2803s) are rated at a maximum output
of 48V at 500 mA per individual output (when only one output
is active). You can get sourcing drivers (2985s) by special order.
Each driver chip can, and should, be connected to a “K” line to
prevent inductive kickback current from damaging the drivers.
HV[00–31]
U1, U4, U8, U12 U5, U6, U13, U14
2803
K
Addressable
Latches, 8x
High-current
Drivers
Select lines 0–7,
8–15, 16–23, or
24–31
U10A
259
D1
13 9
S0
D2
D3
D0
S1
S2
D
/G
Q[0–7]
GND
10K
+5V
4
When all sinking outputs are on simultaneously, thermal limits
restrict the current to 75 mA per output. If the temperature ex-
ceeds 50°C, derate power dissipation by 55°C per Watt.
Jumpers J1 and J3 route the K and GND lines to the drivers, ac-
cording to whether you have sinking or sourcing drivers.
J1 J3
Sinking Sourcing
0–7
8–15
Sinking Sourcing
16–23
24–31
Address Calculation
The logical address of a board is from 0–7. The physical ad-
dress format is shown here:
0001 01xy zabc
x = 1 when J4:1-2 not connected.
y = 1 when J4:3-4 not connected.
z = 1 when J4:5-6 not connected.
The bits xyz correspond to your physical board address, formed
from the address jumpers. The bits abc have special meaning:
000: read board status
100: use digital lines 0-7
101
: use digital lines 8-15
110
: use digital lines 16-23
111
: use digital lines 24-31
Checking For Presence of an XP8100
1 Place the XP8100 address, using abc = 000, on the bus.
2 Read BUSRD0. This returns board status. If the board exists,
D0 will be 0.
Reading an Input
The XP8100 uses two read cycles, BUSRD0 and BUSRD1.
XP8100 I/O channels are organized into four groups of 8 chan-
nels, 0–7, 8–15, 16–23, and 24–31. BUSRD0 returns the first four
channels in a group, in D3–D0. BUSRD1 returns the last four
channels in a group, in D3–D0.
1 Calculate the physical board address from the logical board
address.
2 Add the appropriate value of abc to the board address.
100: use digital lines 0-7 101: use digital lines 8-15
110
: use digital lines 16-23 111: use digital lines 24-31
3 Send the address to the PLCBus.
4 Read BUSRD0 to get the first four lines in the group; use
BUSRD1 to get the last four. Line states return in D3–D0.
The groups of I/O channels are shown here.
Group abc I/O Addr D3 D2 D1 D0
0 100 BUSRD0 03 02 01 00
BUSRD1 07 06 05 04
1 101 BUSRD0 11 10 09 08
BUSRD1 15 14 13 12
2 110 BUSRD0 19 18 17 16
BUSRD1 23 22 21 20
3 111 BUSRD0 27 26 25 24
BUSRD1 31 30 29 28
To use the preceding table, select a channel number (0-31) in
the matrix. Look across to determine its group or bus cycle;
look upward to determine its bit number. Keep in mind
which of your lines are inputs if you have a mix. A read on
an output line is harmless, but it will not be meaningful.
Operating an Output
XP8100 I/O channels are organized into four groups of 8 chan-
nels, 0–7, 8–15, 16–23, and 24–31. BUSWR transfers 4 bits in
D3–D0. Bits D3–D1 identify the line in the group; bit D0 gives
the value for the line (0 off, 1 on).
1 Calculate the physical board address from the logical board
address.
2 Add the appropriate value of abc to the board address.
100: use digital lines 0-7 101: use digital lines 8-15
110
: use digital lines 16-23 111: use digital lines 24-31
3 Send the address to the PLCBus.
4 Write the lines. Use BUSWR. (The group identity passes, as
abc, in the board address.) The line number passes in D3–
D1. Line state passes in D0.
Group: 0123Data Bits
abc: 100 101 110 111 D3 D2 D1 D0
line: 00 08 16 24 000x
01 09 17 25 001x
02 10 18 26 010x
03 11 19 27 011x
04 12 20 28 100x
05 13 21 29 101x
06 14 22 30 110x
07 15 23 31 111x
To use the above table, select a channel number (0–31) in the
matrix. Look upward to determine its group; look across to
determine the appropriate data bits. Writing to an input line
is harmless, but has no effect.