User`s manual

XP8000 Series (PLCBus
TM
) Z-World 530-757-3737 17
Communicating with the PCL-AK
You tell the PCL-AK what to do by (A) writing to its command
buffer and (B) writing values to its control registers. You find
out what it’s doing by reading the status register or a control
register. Only two registers are readable: the counter and ramp-
down point register.
You can issue a hard reset to the PCL-AK by pulsing the /RE-
SET
line. This resets internal registers. A soft reset (given as a
command) does not change internal registers.
Status bits are available at PCL-AK addresses 0 and 3.
Motor Driver
The motor driver (UCN5804) receives two pulse signals from
the PCL-AK. One signal, /PULSE, steps the motor. The other,
PDIR, specifies the motor rotation (1 = forward, 0 = reverse).
The driver receives two mode signals from the control register:
Bit 7 Bit 6 Mode selected
0 0 Two-phase
0 1 Half-step
1 0 Single-phase (or wave)
1 1 undefined. (Do not use this.)
The meaning of these modes lies in how the driver generates
the phase signals A, B, C, and D.
Single-Phase Two-Phase Half-Step
000111111101
0111
0111
0111
0110
0110
0110
0011
1011
1001
1101
1100
1110
0110
AAABBBCCCDDD
F
o
r
w
a
r
d
R
e
v
e
r
s
e
The top line of each sequence (in the above illustration) indi-
cates the state of the driver at power-up. The 0s in the illustra-
tion indicate that the driver line is ON, that is, sinking current.
The phase lines are connected to the motor’s windings thus:
D
C
B
A
V
D
Motor
Driver
D6
D4
D5
D3
Driver Power
To select a motor driver voltage, you must consider the various
losses in the driver circuit, including the collector/emitter volt-
age and the voltage of the blocking diode.
V
M
motor-specified voltage
V
F
diode forward voltage, typically 0 . 7V
V
CE
collector-emitter voltage
driver
V
D
drive voltage
A 5V, 1A motor would require
V
D
= V
M
+ V
CE
+ V
F
V
D
= 5V + 1.1V + 0.7V
V
D
= 6.8V
Quadrature Decoder / Counter
The HCTL-2016 is a 16-bit quadrature decoder and counter. Its
two lines A and B accept two quadrature encoded signals, that
is two square waves 90° out of phase. The order in which these
signals make transitions determines the direction, up or down.
A
Forward Quadrature (Counting Up)
B
A
Reverse Quadrature (Counting Down)
B
Time
There are four states of lines A and B. The counter counts up or
down depending on the state transitions.
The maximum reliable counting frequency is 3 MHz. You can
read the counter as two successive bytes.
Control Register
The control register is an 8-bit write-only latch that controls
operations of the SMC.
Each bit in the register has the following meaning (bit 0 is the
least significant bit):
Bit Name Meaning
0
RESCNT Reset quadrature decoder/counter. Low means reaset.
1 RESCTL Reset the PCL-AK. Low means reset.
2 LED Turn LED on or off. Low means ON.
3 SEL0 Local address line.
4 SEL1 Local address line.
5DRVOEEnable Motor Driver Output. Low means ON.
6 HSTEP Half-step mode for motor driver when this bit is 1 and
bit 7 is 0.
7WAVESingle-phase mode for motor driver when this bit is 1
and bit 6 is 0. Two phase mode when this bit is 0 and
bit 6 is 0.
The select lines SEL0 and SEL1 have very specific meaning.
They are connected to the two address lines of the PCL-AK.
SEL0 is also connected to the quadrature decoder/counter.
Coupled with PAL logic, these select lines allow you to read
and write to the PCL-AK and to read the 16-bit counter value.
External Connection
Signals reach the external world on headers H5 and H6. H5 is a
14-pin header. H6 (next page) is a 16-position terminal block.