User`s manual

PK2200 Interrupts and Addresses s D-91
PK2200 Peripheral Addresses
The following addresses control the I/O devices that are external to the
Z180 processor.
Table D-5. PK2200 External I/O Device Registers
Address Bit(s) Symbol Function
0x40 7 WDOG
Watchdog is “hit” (when
JP3:1-2) by setting bit 7 of
this address.
0x60 7 LED
Turns on LED by setting bit 7
of this address. Turn off by
clearing bit 7.
0x80 7 SCL EEPROM clock bit. Set the
clock high by setting bit 7 of
this address, and low by
clearing bit 7.
0xA0 7 SDA_W EEPROM serial data, write.
Send data in bit 7.
0xC0 0–7 BUSRD0 First read, PLC expansion bus
0xC2 0–7 BUSRD1
Second read, PLC expansion
bus
0xC4 0–7 BUSSPARE Spare read, PLC expansion
bus
0xC6 BUSRESET Read this address to reset all
devices on expansion bus
0xC8 0–7 BUSADR0
PLC expansion bus, first
address byte
0xCA 0–7 BUSADR1 PLC expansion bus, second
address byte
0xCC 0–7 BUSADR2 PLC expansion bus, third
address byte
0xCE 0–7 BUSWR Expansion bus write to port
0xE0 0–7
LCDRD
LCDWR
LCD read/write register,
control
0xE1 0–7 LCDRD+1
LCDWR+1
LCD read/write register, data
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