Service manual

Appendix C Functional Description C-5
even in the presence of conditional branches and cache misses. This sustained
performance is supported by a decoupled prefetch and dispatch unit with
instruction buffer. The UltraSPARC II processor supports both 2-D and 3-D graphics,
as well as image processing, video compression and decompression, and video
effects through the sophisticated VIS. VIS provides high levels of multimedia
performance, including real-time video compression/decompression and two
streams of MPEG-2 decompression at full broadcast quality with no additional
hardware support. The UltraSPARC II processor provides a 2-Mbyte ecache, with
system operating frequencies from 250 MHz to 300 MHz.
UltraSPARC II processor characteristics and associated features include:
■ SPARC-V9 architecture compliance
■ Binary compatible with all SPARC application code
■ Multimedia-capability VIS
■ Multiprocessing support
■ Glueless four-processor connection with minimum latency
■ Snooping cache coherency
■ Four-way superscalar design with nine execution units; four integer
execution units
■ Three floating-point execution units
■ Two graphics execution units
■ Selectable little- or big-endian byte ordering
■ 64-bit address pointers
■ 16-Kbyte non-blocking data cache
■ 16-Kbyte instruction cache; single cycle branch following
■ Power management
■ Software prefetch instruction support
■ Multiple outstanding requests
C.1.5 Memory
Memory uses conventional 5-VDC DRAM SIMMs (DSIMMs) with a 60-ns access
time (see
FIGURE C-1).
The system unit or server memory configuration allows 4, 8, 12, or 16 DSIMMs with
DSIMM memory capacity options of 16 Mbytes, 32 Mbytes, 64 Mbytes, or
128 Mbytes. Memory upgrades are in 4-DSIMM increments. Each DSIMM in a
4-DSIMM group must contain the same memory capacity if not, the lower of the
DSIMM memory capacities determines the other DSIMM capacities.