Service manual
Table Of Contents
- CONTENTS
- TO SERVICE PERSONNEL
- FRONT PANELS
- REAR PANELS
- REMOTE CONTROL PANELS
- SPECIFICATIONS
- INTERNAL VIEW
- SET MENU TABLE
- SERVICE PRECAUTIONS
- DISASSEMBLY PROCEDURES
- UPDATING FIRMWARE
- SELF-DIAGNOSTIC FUNCTION
- Starting Self-Diagnostic Function
- Starting Self-Diagnostic Function in the protection cancel mode
- Canceling Self-Diagnostic Function
- Display provided when Self-Diagnostic Function started
- Display during Self-Diagnostic Function operation
- Operation procedure of Main menu and Sub-menu
- Functions in Self-Diagnostic Function mode
- Initial settings used to start Self-Diagnostic Function
- Details of Self-Diagnostic Function menu
- 1. DSP THROUGH
- 2. RAM THROUGH
- 3. PRO LOGIC / Neo:6
- 4. MIC CHECK
- 5. VFD CHECK
- 6. MANUAL TEST
- 7. RS-232C
- 8. FACTORY PRESET
- 9. AD DATA CHECK
- 10.IF STATUS (Input function status)
- 11.DOCK CHECK
- 12.XM CHECK
- 13.DAB CHECK
- 14.HDMI AUDIO
- 15.HDMI INFORMATION
- 16.HDMI SELECT
- 17.VIDEO CONVERSION
- 18.MODEL
- 19.VERSION/CHECK SUM
- 20.DATE
- 21. DSP CHECK
- DISPLAY DATA
- IC DATA
- BLOCK DIAGRAM
- PRINTED CIRCUIT BOARDS
- PIN CONNECTION DIAGRAMS
- SCHEMATIC DIAGRAMS
- REPLACEMENT PARTS LIST
- REMOTE CONTROL
- Adjusting the system parameters
JK1
CB1
IC1 IC1
IC1 IC1
IC1 IC1
IC4
IC5
IC2
IC2
IC8
IC7
IC9
IC7
IC7
IC7
IC10
IC6
CB2
IC5
IC4
IC4
CB3
W5 CB801
CB4
CB6
CB7
IC901
CB903
W991
CB902
CB901
IC801
IC801
JK801
A
1
2
3
4
5
6
7
8
9
10
BCDEFGH I JK
L MN
YSP-500/HTY-750
71
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★ Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
INPUT 1/2
A-1
5.8
5.8
5.8
5.8
0
11.1
0
3.3
11.1
11.1
11.1
5.8
5.8
5.8
5.8
5.8
5.8
5.8
11.1
0
0
0
0
0
11.1
11.1
11.8
0
5.8
5.1
6.4
8.3
8.3
6.4
5.75.8
5.8
2.8
0
2.7 3.3
0.2
0
5.1
4.4
0
5.1
5.00.2
04.4
0
3.2
3.3
0
0
3.3
3.3
0
3.3
7.8
7.8
-5.5
10.3
0
10.8
10.8
11.8
10.8
0
3.3
5.6
0
0
-5.5
-5.5
5.1
10.9
4.9
4.6
6.4
0
4.9
0
0
0
0
4.9
1.2
4.8
0
0
4.9
5.1
0
4.1
4.1
0.2
3.1
3.1
0
0
-24.1
3.1
-11.1
-12.2
-11.1
3.1
-12.5
-12.2
3.1
-20.7
-20.7
3.1
-20.7
-12.5
-11.0
-20.7
-20.7
-22.3
-14.1
-15.8
-15.8
-11.0
-15.8
-17.5
3.1
-22.3
-22.3
3.1
-22.3
-22.3
3.1
-22.3
-22.3
-22.3
-22.3
-22.3
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-24.1
-12.3
-20.5
3.1
-20.5
-20.5
-20.7
-12.5
-12.5
-11.0
-12.2
-12.5
-11.1
3.1
1.4
0
3.1
3.1
1.4
0
3.1
-17.0
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.4
-22.3
-22.3
-22.3
-17.5
-15.8
-11.0
-15.8
-15.8
-14.1
-22.3
-20.7
-20.7
-11.0
-12.5
-20.7
-19.0
-19.0
-14.2
-17.4
-17.4
-11.0
-17.4
-14.2
-15.8
-19.0
-15.6
-22.3
-10.9
-14.2
-20.7
-20.5
-20.7
-12.5
-12.3
-12.5
-11.0
-12.2
-11.1
-17.0
-19.0
-14.2
-17.4
-17.4
-11.0
-17.4
-14.2
-15.8
-19.0
-15.6
-22.3
-10.9
-14.2
3.1
-20.7
-17.0
4.1
0
0
0
5.6
0
0
05.0
00
3.3
5.1
0.4
0
0
0.7
10.6
5.6
5.6
0
0.1
1.8
5.0
5.1
0
2.6
2.2
0
5.1
5.1
0
0
10.6
11.1
5.1
0
3.3
0
0
5.1
3.3
3.3
5.1
3.3
3.3
3.35.1
5.6
0
3.3
3.8
5.0
5.0
1.8
0
0
0
5.0
2.5
0
5.0
5.0
0
1.9
1.8
5.0
5.0
5.0
0
0
0
0
5.7
5.8
5.1
6.4
8.3
8.3
6.3
ANALOG IN
DIGITAL IN
SUBWOOFER OUT
52
Display
controller
Serial
receive
circuit
Digit
output
circuit
Clock
generator
DIG11/
SEG42
51
DIG12/
SEG41
50
DIG13/
SEG40
49
DIG14/
SEG39
48
DIG15/
SEG38
47
DIG16/
SEG37
46
DIG17/
SEG36
45
SEG35
XOUT
6
Vcc1
8
Vcc2
18
Vss
5
Vp
64
XIN
7
CS
SCK
3
SDATA
4
RESET
1
SEG00
44
9
SEG34
SEG26
17
19
SEG25
Segment
output
circuit
Display code
RAM
(8-bit x 60)
CGROM
(35-bit x 166)
CGROM
(35-bit x 16)
code
select
Code
write
Code/
command
control
circuit
DIG00
63
53
DIG10
IC901: M66003-0131FP-R
18 digit 5 x 7 segment VFD controller/driver
2
data
timing
clock
dot data
write
scan pulse
Segment/
Digit
select/
output
circuit
DIN1
DOUT1
RIN1ROUT1
DIN2
DOUT2
RIN2ROUT2
11
10
12
9
14
7
13
8
IC6: MAX3232CDWR
3-V to 5.5-V multi-channel RS-232 line driver/receiver
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C1+
V+
C1
C2+
C2
V
DOUT2
RIN2
VCC
GND
DOUT1
RIN1
ROUT1
DIN1
DIN2
ROUT2
IC5, 801: NJM2068MD-TE2
Dual operational amplifier
OUT1
OUT2
–IN1
+IN1
+IN2
-IN2
–VCC
+VCC
1
2
3
4
8
7
6
5
+
–
+
–
1
2
3
4-V
8
7
6
5
Output A +V
Non-Inverting
Input A
-DC Voltage Supply
+DC Voltage
Supply
Output B
Inverting
Input B
Non-Inverting
Input B
Inverting
Input A
+-
+-
IC2: NJM3404AM-TE1
Single-supply dual operational amplifier
IC7: TC74HCT08AF
Quad 2-input AND gate
Vcc14
4B13
4A12
4Y11
3B10
3A9
3Y8
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
IC1: TC74HCU04AFEL
Hex inverters
VCC
6A
5A
4A
6Y
5Y
4Y
GND
3Y
3A
2A
1A
2Y
1Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IC4: TC4052BF
Analog multiplexer/demultiplexer
16
10
9
6
87
13
12
14
15
11
1
5
2
4
3
X-COMMON
0X
1X
2X
3X
0Y
1Y
2Y
3Y
Y-COMMON
VEEVSS
INH
B
A
VDD
LOGIC LEVEL
CONVERTER
I/O c O/I
I/O c O/I
I/O c O/I
I/O c O/I
I/O c O/I
I/O c O/I
I/O c O/I
I/O c O/I
IC8: MB90050PF-G-118-E1
OSD controller
IC8: MB90050PF-G-119-E1
OSD controller
VOUT
YOUT
COUT
PO3
PO2
PO1
PO0
SIN
SCLK
CS
VIN
YIN
CIN
VSYNCI
FLDI
SYNCST
HSYNCI
HSYNCO
VSYNCO
CSYNCO
FLDO
VBLKO
EXS
XS
FSC4O
EXD
XD
DCLKO
BUSY
RESET
DCOL5 to DCOL0
DB
DH
Serial input
control
Analog
switch
Sync control
Video signal
generator circuit
NTSC/PAL
signal
generator
circuit
Output control
Palette
(4 bits→6 bits)
Display Memory control
Font RAM
(8 characters)
Font ROM
(512 characters)
VRAM
(35 characters
× 16 lines)
4FSC clock
oscillation
circuit
Dot clock
oscillation
circuit
Port control
Each block
Each block
All reset
Each block
FLDI
VSYNCI
HSYNCI
V
CC
VSS
EXS
XS
FSC4O
VSYNCO
HSYNCO
CSYNCO
VBLKO
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
PO3
PO2
DCOL5
DCOL4
DCOL3
DCOL2
DCOL1
DCOL0
DCLKO
DB
DH
RESET
48
47
46
45
44
43
42
41
40
39
38
37
YOUT
TESTI2
YIN
AV
SS2
CIN
AV
CC2
COUT
AV
SS1
VOUT
AVCC1
VIN
TESTI1
13
14
15
16
17
18
19
20
21
22
23
24
FLDO
SYNCST
CS
SCLK
SIN
BUSY
XD
EXD
V
SS
VCC
PO0
PO1
MB90050
VOUT
YOUT
COUT
PO3
PO2
PO1
PO0
SIN
SCLK
CS
VIN
YIN
CIN
VSYNCI
FLDI
SYNCST
HSYNCI
HSYNCO
VSYNCO
CSYNCO
FLDO
VBLKO
EXS
XS
FSC4O
EXD
XD
DCLKO
BUSY
RESET
DCOL5 to DCOL0
DB
DH
Serial input
control
Analog
switch
Sync control
Video signal
generator circuit
NTSC/PAL
signal
generator
circuit
Output control
Palette
(4 bits→6 bits)
Display Memory control
Font RAM
(8 characters)
Font ROM
(512 characters)
VRAM
(35 characters
× 16 lines)
4FSC clock
oscillation
circuit
Dot clock
oscillation
circuit
Port control
Each block
Each block
All reset
Each block
FLDI
VSYNCI
HSYNCI
V
CC
VSS
EXS
XS
FSC4O
VSYNCO
HSYNCO
CSYNCO
VBLKO
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
PO3
PO2
DCOL5
DCOL4
DCOL3
DCOL2
DCOL1
DCOL0
DCLKO
DB
DH
RESET
48
47
46
45
44
43
42
41
40
39
38
37
YOUT
TESTI2
YIN
AV
SS2
CIN
AVCC2
COUT
AVSS1
VOUT
AV
CC1
VIN
TESTI1
13
14
15
16
17
18
19
20
21
22
23
24
FLDO
SYNCST
CS
SCLK
SIN
BUSY
XD
EXD
V
SS
VCC
PO0
PO1
MB90050
IC10: NJM78M05FA
3-terminal positive voltage regulator
IN
OUT
GND
POINT A-1 XL1 (Pin 6 of IC8)
RS232C
DRIVER
INPUT (2)
INPUT (3)
INPUT (5)
INPUT (4)
FL DRIVER
AMP
OSD
REGULATOR
INPUT SELECTOR
AUX (T, K, A, B, G, E, L, V models)
DVD (J model)
DVD (T, K, A, B, G, E, L, V models)
DIGITAL
OUT
COAXIAL
OPTICAL
AUX (J model)
VCR (T, K, A, B, G, E, L, V models)
VIDEO (J model)
TV/STB (T, K, A, B, G, E, L, V models)
TV/TUNER (J model)
VOLUME
+
INPUT
STANDBY/ON
VOLUME
-
AUDIO
INPUT
to DSP_CB204
Page 69
K4
to INPUT (1)_W506
Page 72
L5
to INPUT (1)_CB505
Page 72
L3
to DSP_CB205
(Writing port)
Page 69 K6