User's Manual

Acknowledge
An acknowledge must be sent at the end of one data byte. The acknowledge-related clock
pulse is generated by the master. The transmitter of data, either master or slave, releases
the SDA line (HIGH) during the acknowledge clock pulse. The receiver pulls down the
SDA line during the acknowledge clock pulse so that it remains stable LOW during the
HIGH period of this clock pulse.
The master can then generate either a STOP (P) condition to stop the transfer or a
repeated START (Sr) condition to start a new transfer.
A master-receiver indicates the end of data to the slave-transmitter by not generating an
acknowledge on the last byte that was clocked out by the slave. The slave-transmitter
releases the data line to allow the master to generate a STOP (P) or repeated START (Sr)
condition.
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Acknowledge on the I2C-bus
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Data transfer on the I2C-bus
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Register read access
To read out data from a specific register address in the Module, the host controller must
use the following procedure:
• Firstly, a write access to the specific register address must be performed as indicated