User manual

SPI-4.2 v8.5 Getting Started Guide www.xilinx.com 29
UG154 March 24, 2008
Directory and File Contents
R
implement/results
The results directory is created by the implement script, after which the implement script
results are placed in the results directory.
<component name>/simulation
The simulation directory contains the necessary files to test a VHDL or Verilog example
design with the demonstration test bench.
Table 4-6: Results Directory
Name Description
<project_dir>/<component_name>/implement/results
Implement script result files.
Back to Top
Table 4-7: Simulation Directory
Name Description
<project_dir>/<component_name>/simulation
data_file.dat
Data file containing the data to be sent
across the SPI-4.2 Interface
pl4_clk_gen.v[hd]
Demo Test bench Clock Generator
pl4_data_monitor.v[hd]
Demo Test bench Data Monitor
pl4_demo_testbench.v[hd]
Demo Test bench Top Level Module
pl4_procedures.v[hd]
Demo Test bench Procedures Module
pl4_src_clk.v[hd]
HDL file which is utilized if the Slave core
is configured with slave clocking
pl4_startup.v[hd]
Demo Test bench DCM Startup and
Calendar Loader Module
pl4_status_monitor.v[hd]
Demo Test bench Status Monitor
pl4_stimulus.v[hd]
Demo Test bench Data and Status Stimulus
Module
pl4_testcase.v[hd]
pl4_testcase_pkg.v[hd]
Controls the operation of the demonstration
test bench and can be user-modified.
snk_calendar.dat
Data file containing the calendar
information for the Sink interface
src_calendar.dat
Data file containing the calendar
information for the Source interface
[glbl.v]
Asserts initial global reset pulse
(Verilog only)
Back to Top