User manual

SPI-4.2 v8.5 Getting Started Guide www.xilinx.com 19
UG154 March 24, 2008
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Chapter 3
Quick Start Example Design
The quick start steps provide information to quickly generate a SPI-4.2 core, run the design
through implementation with the Xilinx tools, and simulate the example design using the
provided demonstration test bench. For more detailed information about this example
design, see Chapter 4, “Detailed Example Design.”
Overview
The SPI-4.2 example design consists of the following:
• SPI-4.2 Sink and Source core netlists
• SPI-4.2 Sink and Source core simulation models
• Example HDL wrapper (which instantiates the cores and example design)
• Customizable demonstration test bench to simulate the example design
Generating the Core
To generate a SPI-4.2 core with default values using the Xilinx CORE Generator system, do
the following:
1. Start the CORE Generator system.
For help starting and using the CORE Generator system, see the Xilinx CORE Generator
Guide, available from the ISE documentation.
2. Choose File > New Project.
3. Type a directory name. For this example design, use the directory name design.
4. Set the following project options:
♦ Part Options
- From Target Architecture, select either Virtex
TM
-4 or Virtex-5.
Note: If an unsupported silicon family is selected, the SPI-4.2 core will not appear
in the taxonomy tree.
Note: The Device, Package and Speed Grade selected in the Part Options tab have
no effect on the generated core. The core is delivered with an example UCF
targeting either Virtex-4 4vlx25ff668 or Virtex-5 5v1x50-ff676.
♦ Generation Options
- For Design Entry, select either VHDL or Verilog.
- For Vendor, select Synplicity or Other (for XST).