User Manual

COMMUNICATION CERTIFICATION LABORATORY TEST REPORT: 73-6560
FCC ID: NQE1005
Address
32 bit (4 Byte) programmable address stored in non-volatile
memory
Transmission Interval
Programmable interval from 1 to 10000 used to update the
next transmission capture count. Interval stored in non-
volatile memory.
Pulse debounce Duration
Programmable from 1 to 255 ms with 50 ms set as factory
default. Pulse duration (debounce) stored in non-volatile
memory
Counter Preload
Programmable counter preloaded from 0 – 65535 (2 bytes).
TIM Options Programming Communications Format
Handshake
TIM must recognize a handshake routine from the PC parallel
port as follows. Pclk and Pdata are inputs to the TIM during
handshake
Parallel Port to TIM out Tim Responds
Pclk Pdata
1. 0 1 0
2. 0 0 1
3. 0 1 0
4. 1 1 1
Data Transfer – Write
After accepting the handshake sequence, the TIM will read in the next 8 bits of data
that is presented on the Pdata pin when the Pclk pin transitions from low to high. If
the 8 bits is a ‘A0’ hex, the TIM will receive the next 72 bits as data in, then store
the data at the appropriate location in NVRAM.
Pdata |¯¯|___|¯¯|________________ (1100110000000000)
(A0)
Pclk _|¯|_|¯|_|¯|_|¯|_|¯|_|¯|_|¯|_|¯|__ (0101010101010101)
Data Sequence – Write
Pdata ==
[Command][Addr1][Addr2][Addr3][Addr4][IntrvlHigh[IntrvlLo][D
ebounce][PresetHigh[PresetLo]