Product Specs

4
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Subject: Doc. No.: Rev: 0.6
UMC-STD31BPN Product Specification Page 12 of 55
本資料為啟碁科技股份有限公司專有之財產，非經書面許可，不准透露或使用本資料，亦不准複印，複製或轉變成其他形式使用。
The information contained herein is the exclusive property of WNC and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission from WNC.
Form No.: 2-JT-00022-03_001
UMC-STD31BPN Product Specification
12
3.4 Pin definition table
NC: No Connection
PD: Pull Down
PU: Pull Up
NOTE1 All unused pins should be assigned as “No Connection” on the application board
NOTE2 Internal pull-up/pull-up resistor of GPIO pins in MT2731
Type1 I/O：Internal resistance could be 3 options (10k-OHM, 50K-OHM, and 10K-OHM||50K-OHM) so far
for GPIO30~36, GPIO59~64,GPIO110~115, GPIO134~145.
Type2 I/O：75K-OHM is a typical value (in the range of 40K-OHM~190K-OHM) for others I/O that cannot
be configured to different resistance.
NOTE(*) In the specified software(Part#: 53tbc), NAD pin#L8 is no longer being a GPI pin as default and
configured as ”MCU_RESET_B” to support following reset function
This pin is triggered high to close application software firstly, and then to do the reset of PMIC for
rebooting NAD after the power-off/-on sequence
*GO1-GO55, Please read the table 3.5.1/3.5.2 (GO: Go through IO function)
NAD
Pin#
Symbol Name
Power
Domain
Voltage
Internal
Pull
State
MT2731
Pin-out
GPIO
Description
A2
PCIE_PERST_N
DVDD18
1.8V
PD
F22
GPIO46
PCIe
A3
GND
n/a
A4
PCIE_LN0_TXP
AVDD18_PCIE
1.8V
D26
PCIe
A5
PCIE_LN0_TXN
AVDD18_PCIE
1.8V
D25
PCIe
A6
PCIE_LN0_RXN
AVDD18_PCIE
1.8V
G25
PCIe
A7
PCIE_LN0_RXP
AVDD18_PCIE
1.8V
G26
PCIe
A8
GND
n/a
A9
NC
J25
A10
NC
J24
A11
KPCOL0
DVDD18
1.8V
PU
AD23
GPIO58
Pull this pin low to force NAD
being USB Download Mode
for the software upgrade