User's Manual

User manual of 3G SEP EVDO module
Page 38
Figure 14: PCM_CODEC to MDM timing
Figure 15: MDM to PCM_CODEC timing
Parameter
Condition Mi
n
Typ Max Unit
t(sync) PCM_SYNC cycle time - 125 - us
t(synca) PCM_SYNC asserted time - 488 - ns
t(syncd) PCM_SYNC de-asserted time - 124.5 - us
t(clk) PCM_CLK cycle time - 488 - ns
t(clkh) PCM_CLK high time - 244 - ns
t(clkl) PCM_CLK low time - 244 - ns
t(sync_o
ffset)
PCM_SYNC offset time to
PCM_CLK falling
- 122 - ns
t(sudin)
PCM_DIN setup time to
PCM_CLK falling
60 - - ns
t(hdin)
PCM_DIN hold time after
PCM_CLK falling
60 - - ns