User's Manual

User manual of 3G SEP EVDO module
Page 14
Pulse-code modulation (PCM) audio ports:
Fixed sampling rate at 8 kHz
8 bits A-Law or µ-Law
16 bits linear PCM
PCM master mode
 Fixed PCM clock rate at 128 kHz or 2.048 MHz
PCM slave mode
 Fixed PCM clock rate at 2.048 MHz only
Signal Pin N° Description
I2S/PCM_CLK 113 I2S/PCM clock signal
I2S_WS/PCM_SYNC 49 I2S word select/ PCM sync signal
I2S/PCM_RX 115 I2S/PCM data input
I2S/PCM_TX 50 I2S/PCM data output
I2S_MCLK 114 I2S master clock
2.2.2 Data services
The module supports the following services:
 Data 1xEV-DOrA:
 Standard
- DL: up to 3.1 Mbps
- UL: up to 1.8 Mbps
2.2.3 UART interface
The UART interface is provided on external pins of the module with the
following signals:
 RX/TX
 RFR/CTS
UART Speed
AT commands and DATA: up to 4 Mbit/s