Data Sheet

Wireless-Tag Technology Co., Ltd. V1.0.1
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http://www.wireless-tag.com
14
4.16 Inter-Integrated Circuit Interface(I2C)
The I2C (Inter-chip) bus interface connects the microcontroller and the serial I2C bus. It provides the
multi-master capability and controls all I2C bus-specified sequencing, protocol, arbitration and timing. It
supports standard mode, fast mode and super ultra-fast mode. At the same time, it is compatible with
SMBus (System Management Bus) and PMBus (Power Management Bus). DMA can be used to reduce
the burden on the CPU.
The features are described as follows:

Slave mode and master mode
 Multi-master mode

Standard mode (up to 100KHz)
 Fast mode (up to 400KHz)

Ultra-fast mode (up to 1MHz)
 7-bit and 10-bit addressing modes

Multiple 7-bit slave addressing (2 addresses, one of which can be masked)
 All 7-bit addressing response mode

Broadcast call
 Programmable setup and hold time

Optional clock stretching
 Programmable digital noise filter

Transmit/receive FIFOs of depth 8
 DMA function

SMBus specification
 Generation and verification hardware PEC (Packet Error Checking) , with ACK control

Command and data response control
 Support address resolution protocol (ARP)

Master and device supporting
 SMBus alert

Timeout and idle state detection
 Compatible with PMBus version 1.1 specification
4.17 Serial Peripheral Interface 1(LSSPI)
SPI1 is a full-duplex master/slave synchronous serial interface. The master processor accesses data, control
and status information on LSSPI through a bus interface. LSSPI is connected to a DMA controller through
a set of DMA signals. LSSPI can be set to one of the two operating modes: serial master mode or serial