Data Sheet
Table Of Contents
- WT32C3-S1 User manual V1.0.0-加警告语 5.25
- 警告语
- Federal Communication Commission Statement (FCC, U.S.)
- FCC Caution:
- IMPORTANT NOTES
- Co-location warning:
- OEM integration instructions:
- Validity of using the module certification:
- End product labeling:
- Information that must be placed in the end user manual:
- Integration instructions for host product manufactures according to KDB 996369 D03 OEM Manual v01
V1.0.0
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Pin
Name
Description
15
GPIO2
GPIO2,ADC1_CH2,FSPIQ
16
GPIO5
GPIO5,ADC2_CH0,FSPIWP,MTDI
17
GPIO4
GPIO4,ADC1_CH4,FSPIHD,MTMS
18
GND
GND
3.3 Strapping Pins
ESP32-C3 series has three strapping pins.
GPIO2
GPIO8
GPIO9
Software can read the strapping values of these pins in “GPIO_STRAPPING” register.
During the chip’s system reset(power-on reset, RTC watchdog reset, brownout reset, analog super
watchdog reset, crystal clock glitch detection reset), the latches of the strapping pins sample the voltage
level as strapping bits of “0” or “1”, and hold these bits until the chip is powered down or shut down.
By default, GPIO9 is connected to the internal pull-up resistor. If GPIO9 is not connected or connected to
an external high-impedance circuit, the latched bit value will be “1”.
To change the strapping bit values, you can apply the external pull-down/pull-up resistances, or use the
host MCU’s GPIOs to control the voltage level of these pins when powering on ESP32-C3 family.
After reset, the strapping pins work as normal-function pins.
Refer to Table 2 for a detailed boot-mode configuration of the strapping pins.
Note:
Some pins have been internally pulled up, please refer to the schematic diagram.
Table 2 Strapping Pins
Booting Mode
1
Pin
Default
SPI Boot
Download Boot
GPIO2
N/A
1
1
GPIO8
N/A
Don't care
1
GPIO9
Internal
pull-up
1
0
Enabling/Disabling ROM Code Print During Booting