Specifications
Table Of Contents
- Home
- Table of Contents
- 1 General Information 1-1
- 2 EBC-BX Technical Reference 2-1
- 2.1 Introduction 2-1
- 2.2 Intel FW82443BX / SMSC Victory-66 Chipset 2-1
- 2.3 Memory Installation 2-1
- 2.4 Interrupt Routing 2-2
- 2.5 Power/Reset Connections 2-3
- 2.6 Mouse Interface 2-3
- 2.7 Real Time Clock/Calendar 2-4
- 2.8 Keyboard Interface 2-4
- 2.9 Serial Interface 2-5
- 2.10 Parallel Printer Port 2-12
- 2.11 Speaker/Sound Interface 2-12
- 2.12 PC/104 Bus Interface 2-12
- 2.13 PC/104 Plus Bus Interface 2-13
- 2.14 Floppy Disk Interface 2-14
- 2.15 IDE Hard Disk Interface 2-15
- 2.16 Watchdog Timer Configuration 2-16
- 2.17 Status LED 2-16
- 2.18 Battery Select Control 2-16
- 2.19 DiskOnChip Configuration 2-17
- 2.20 Parallel I/O 2-18
- 2.21 VGA Configuration 2-21
- 2.22 Ethernet Controller 2-23
- 2.23 Fan Power Connector 2-24
- 2.24 Multi I/O Connector 2-25
- 2.25 USB Connector 2-25
- 2.26 Jumper Connector Summary 2-26
- 3 AWARD BIOS Configuration 3-1
- 3.1 General Information 3-1
- 3.2 Entering Setup 3-1
- 3.3 Setup Main Menu 3-1
- 3.4 Standard CMOS Features 3-2
- 3.5 Advanced BIOS Features Setup 3-6
- 3.6 Chipset Features Setup 3-11
- 3.7 Integrated Peripherals Setup 3-14
- 3.8 Power Management Setup 3-19
- 3.9 PNP/PCI Configuration 3-23
- 3.10 PC Health Status 3-25
- 3.11 Frequency/Voltage Control 3-25
- 3.12 Load BIOS Defaults 3-26
- 3.13 Set Supervisor Password 3-27
- 3.14 Set User Password 3-27
- 3.15 Save and Exit Setup 3-27
- 3.16 Exit without Saving 3-27
- 4 EBC-BX DiskOnChip Configuration 4-1
- 5 WS16C48 Programming Reference 5-1
- APPENDIX A I/O Port Map
- APPENDIX B Interrupt Map
- APPENDIX C EBC-BX Parts Placement Guide
- APPENDIX D EBC-BX Parts List
- APPENDIX E EBC-BX Mechanical Drawing
- APPENDIX F WS16C48 I/O Routines and Sample Program Listings
- Warranty and Repair Information
treme force. The mod ule is in serted un til the re tain ing clips snap into place. Re moval is the re verse
pro cess. Push down on the re tain ing clips, mov ing them out ward. The DIMM mod ule, once re leased,
will be forced up to an ap pro pri ate re moval po si tion.
2.4 In ter rupt Rout ing
All in ter rupts on the EBC- BX are routed to their re spec tive PC/104 bus pins. On board non- PnP pe -
riph er als, are routed to their typi cal us age in ter rupts us ing the jumper block at J19. This block al lows
dis con nect ing or re rout ing of the on board in ter rupts. The lay out for the J19 header and the de fault
jumper set tings are shown be low.
Page 2 - 2 OPERATIONS MANUAL EBC-BX 030923
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21 19 17 15 13 11 9 7 5 3 1
o o o o o o o o o o o
o o o o o o o o o o o
22 20 18 16 14 12 10 8 6 4 2
In ter rupt rout ing header J19
1 o o 2
3 o o 4
5 o o 6
7 o o 8
9 o o 10
11 o o 12
13 o o 14
15 o o 16
17 o o 18
19 o o 20
21 o o 22
J19
IRQ3
IRQ4
IRQ5
IRQ7
IRQ6
IRQ14
IRQ15
IRQ12
IRQ11
IRQ10
IRQ9
N/C
N/C
COM3
N/C
N/C
Primary IDE
Secondary IDE
COM4
COM3
Parallel I/O
COM4