Specifications
Table Of Contents
- Home
- Table of Contents
- 1 General Information 1-1
- 2 EBC-BX Technical Reference 2-1
- 2.1 Introduction 2-1
- 2.2 Intel FW82443BX / SMSC Victory-66 Chipset 2-1
- 2.3 Memory Installation 2-1
- 2.4 Interrupt Routing 2-2
- 2.5 Power/Reset Connections 2-3
- 2.6 Mouse Interface 2-3
- 2.7 Real Time Clock/Calendar 2-4
- 2.8 Keyboard Interface 2-4
- 2.9 Serial Interface 2-5
- 2.10 Parallel Printer Port 2-12
- 2.11 Speaker/Sound Interface 2-12
- 2.12 PC/104 Bus Interface 2-12
- 2.13 PC/104 Plus Bus Interface 2-13
- 2.14 Floppy Disk Interface 2-14
- 2.15 IDE Hard Disk Interface 2-15
- 2.16 Watchdog Timer Configuration 2-16
- 2.17 Status LED 2-16
- 2.18 Battery Select Control 2-16
- 2.19 DiskOnChip Configuration 2-17
- 2.20 Parallel I/O 2-18
- 2.21 VGA Configuration 2-21
- 2.22 Ethernet Controller 2-23
- 2.23 Fan Power Connector 2-24
- 2.24 Multi I/O Connector 2-25
- 2.25 USB Connector 2-25
- 2.26 Jumper Connector Summary 2-26
- 3 AWARD BIOS Configuration 3-1
- 3.1 General Information 3-1
- 3.2 Entering Setup 3-1
- 3.3 Setup Main Menu 3-1
- 3.4 Standard CMOS Features 3-2
- 3.5 Advanced BIOS Features Setup 3-6
- 3.6 Chipset Features Setup 3-11
- 3.7 Integrated Peripherals Setup 3-14
- 3.8 Power Management Setup 3-19
- 3.9 PNP/PCI Configuration 3-23
- 3.10 PC Health Status 3-25
- 3.11 Frequency/Voltage Control 3-25
- 3.12 Load BIOS Defaults 3-26
- 3.13 Set Supervisor Password 3-27
- 3.14 Set User Password 3-27
- 3.15 Save and Exit Setup 3-27
- 3.16 Exit without Saving 3-27
- 4 EBC-BX DiskOnChip Configuration 4-1
- 5 WS16C48 Programming Reference 5-1
- APPENDIX A I/O Port Map
- APPENDIX B Interrupt Map
- APPENDIX C EBC-BX Parts Placement Guide
- APPENDIX D EBC-BX Parts List
- APPENDIX E EBC-BX Mechanical Drawing
- APPENDIX F WS16C48 I/O Routines and Sample Program Listings
- Warranty and Repair Information
2.21.2 Panel Back light Con nec tion
Panel Back light con nec tion is made via the con nec tor at J25. The pinout for J25 is shown here for
reference.
2.21.3 Flat Panel Out put Con nec tion
Con nec tion to all flat pan els is made via the two 50- pin con nec tors at J31 and J32. These con nec tors
are ca bled to the ap pro pri ate FPA (Flat Panel Adapter) mod ule which then breaks out the nec e s sary ca -
bling for at tach ment to the panel it self. The FPA mod ule also sup plies any spe cial con trols that may be
needed for the panel. Ref er to the FPA docu men ta tion for spe cific hookup in struc tions. The pin defi ni -
tions for J30 and J33 are shown here :
Page 2 - 22 OPERATIONS MANUAL EBC-BX 030923
WinSystems - "The Embedded Systems Authority"
J25
o 1
o 2
o 3
o 4
o 5
o 6
o 7
+12
+12
GND
GND
ENBKL
VCC
VCC
1 o o 2
3 o o 4
5 o o 6
7 o o 8
9 o o 10
11 o o 12
13 o o 14
15 o o 16
17 o o 18
19 o o 20
21 o o 22
23 o o 24
25 o o 26
27 o o 28
29 o o 30
31 o o 32
33 o o 34
35 o o 36
37 o o 38
39 o o 40
41 o o 42
43 o o 44
45 o o 46
47 o o 48
49 o o 50
FP12
FP13
FP14
FP15
FP16
FP17
FP18
FP19
FP20
FP21
FP22
FP23
FP24
FP25
FP26
FP27
FP28
FP29
FP30
FP31
FP32
FP33
FP34
FP35
SWVCC
SW1
SW3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
-12V
+12V
SWVCC
J30
1 o o 2
3 o o 4
5 o o 6
7 o o 8
9 o o 10
11 o o 12
13 o o 14
15 o o 16
17 o o 18
19 o o 20
21 o o 22
23 o o 24
25 o o 26
27 o o 28
29 o o 30
31 o o 32
33 o o 34
35 o o 36
37 o o 38
39 o o 40
41 o o 42
43 o o 44
45 o o 46
47 o o 48
49 o o 50
J33
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SWVCC
SW0
SW2
FPO
FP1
FP2
FP3
FP4
FP5
FP6
FP7
FP8
FP9
FP10
FP11
PCSHCLK
PCFLM
PCLP
PCM
PHSYNC
PVSYNC
ENVCC
ENBKL
ENVEE
+12V
SWVCC