Installation Manual

6
Pin12
GPIO
NC
Pin13
GPIO
NC
Pin14
GPIO
NC
Pin15
LOG_RX
( Mass production, burning and hiring)
Pin16
LOG_TX
( Mass production, burning and hiring)
Pin17
I2C_SDA
Pin18
I2C_SCL
Pin19
SPI_CS
Pin20
VCC
3.3 V
Pin21
GND
Pin22
GPIO
I/O
Pin23
GPIO
I/O
Pin24
SPI_CLK
Pin25
SPI_MISO
The Pin definition comparison table
3. Feature Introduction
3.1. MCU
The module's built -in arm cortex-m4f kernel has floating-POINT units (FPU) and Memory
PROTECTION units (MPU), as well as the up –level ARM Cortex optimized for embedded applications
THUMB® instruction set nested vector interrupt Controller (NVIC) is tightly integrated with the processor
kernel for low latency and interrupt processing. Low cost debugging solution with Serial Line debug port
(SW-DP) or serial line JTAG Debug Port (SWJ-DP ) Debugging accesses multiple high-performance bus
interfaces.
3.2. Storage
3.2.1 ROM
Built-in 24K byte ROM, which stores BootRom, is primarily used for image burning/secure boot/non-
secureboot feature mode selection.
3.2.2 SRAM
Provides up to 256KB of on-chip SRAM. Internal RAM is used not only for code and data storage, but
also for shared memory in WIFI packet buffers. Can be flexibly configured by the software. Internal
SRAM can configure Data retention in powersaving mode.
3.2.3 FLASH
Provides built-in 2MBSIP Flash, supports up to 16MB QSPI flash memory, hardware encryption and
flash remapping capabilities to protect user programs AND data, and accelerate OTA upgrades.
Soc Internal integration Cache to improve Flash access and operational efficiency.
3.2.4 One-Time Programmable Memory